Which process is better for designing frequency synthesizer?
Thanks in advance!
it will depend on the frequency range of the synthesizer and the available analog options in the process
khouly
Thanks!
The range is about from 1.8G~2G, and mainly for low phase noise application. Then which is better? And why?
The answer is yes, one of those will be better. What are you prepared to trade off?
wafer cost
Die area
Inductor Q
Power consumption
These tradeoff's will be different for each project
Dave
www.keystoneradio.com
Hi, Dave
My trade off is mainly
1st: Phase noise
2nd: Die area
3rd: Power consumption
Then which is better?
Thank you!
Phase noise will be greatly influenced by the inductor Q. Figure out which one will give you the best inductor Q, and that should answer your question.
CLose in, 1/f noise will contribute to phase Noise. Larger feature sizes tend to have better 1/f noise, so I'd look hard at the 0.35 um size. I suspect that better inductor Q would be better than lower 1/f noise, so push that instead.
Dave
www.keystoneradio.com
The area is mainly decided by the large capacitor of the loop filter. Then in different feature size, are the area of the capacitors the same if their values are equal?
Thanks!
Since capacitance is primarly dependent on physical size of the plate, I'd suspect that cap size is independent of the minimum feature size.
Dave
www.keystoneradio.com
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