微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 微波和射频技术 > 天线设计和射频技术 > Question about T/R switch design topology

Question about T/R switch design topology

时间:04-10 整理:3721RD 点击:
Hi,

I am currently design a RF switch using 0.18-um CMOS technology for my final year project.
I used the series-shunt topology which is normally used in T/R switch.

In some T/R switch design, there is a bypass capacitor added at the source of the shunt transistor as AC ground,but some without the capacitor.May I know what is the difference between them?

What criteria i need to consider when i want to decide the transistor width?

Attached is the switch schematic,please kindly give me some advices.

Thanks.

insertion loss and isolation

P1dB and IP3

I believe your circuit is incomplete. Since the shunt fet is controlled by the DC Vgs, and if there is a capacitor there you can not tell what the Vgs is, I think you would need some resistance to ground across it.

FETs usually use a negative voltage on the gate to source to pich them off. If you have a positive control voltage, say from 0 to +5 volts, that will not work. But if you float the whole circuit up off of ground, by using DC blocking capacitors, you can control the switch with positive logic voltages. You need DC blocking caps everywhere, and some internal biasing schem to do that.

do you mean the DC blocking caps are needed at the input and output node as well? and i need to use biasing circuit to provide DC bias at the source of the shunt transistor?how about the input and output node?do i need to DC bias them as well?
Thanks!

I also have a question, for the series -shunt switch design shown above, does any one know why capacitors are added between the gate and source and also between the gate and drain?

What is it purpose?

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top