this idea will work? (2 PLLs for quadrature generation)

Hello,

I want to ask if its possible to generate quadrature clock signals using 2 input signals with a small phase shift between them, applied to 2 PLLs like in the image.

https://www.edaboard.com/viewtopic.php?p=901491#901491

I know about obtaining quadrature signals using 2 flip flops and an inverter, but I want to use the above circuit - with PLL, because the maximum frequency of the VCO in the PLL is limited, and I can't aford the frequency division with 2.

Please tell me if this will work, and if the frequency dividers implemented as cascaded flip-flops should be reset at the start, to ensure proper phase shift, or the PLLs wil take care of this?

Thank you.

If you are making your own PLL ( IC ) then you can build a quadrature VCO.


Otherwise, you can use a polyphase circuit to generate the quadrature signal without frequency division ( and without need for 2 PLLs )

Another method is to generate the signal at 4x the required frequency and then use a 1/4 johnson counter.