lvds common mode voltage
LVDS driver and receiver pose both high-impedance nodes to common-mode signals which cuople into the differential line (on the TX there are current sources - on RX MOSFET gates) - so my question is - how are the common mode sdisturbances "damped"/"rejected" - the reflection factors are in no way as good as for the the differential signal (which see at least on the receiver side a differential termination resistor).
So what happens to common-mode disturbances in LVDS-signaling ?
I think common-mode disturbances have small effect on LVDS-signaling
well, yes that's true - because the receiver only detects differential signals.
But : - if you have common-mode- signals that will see reflection factors of > 99% on each side - the common-mode-signal will add up quite "a bit" when these reflection interfer at the ends - so a disturbance of 20 (to 40 dB) below the signal can quickly add up to a disturbance that might reach the borders of common-mode at the receiver side imo (under worst case conditions).
- furtheron if the single-ended finite resistors at the ends of the line are to a certain degree unbalanced - than this will generate a differential signal - and if you have a cmfb-amplifier this might be the case for certain (high) frequencies quite extensively (maybe there might be some fixing for that by design of the cmfb - let me know how to do that ;)) - at least when I do the test in Figure 3-10 in the IEEE standard I will get quite annoying results with a cmfb-approach - so let me know ...
Hello
You have no ideal simmetry on PCB and IC package
So diff mode will couple to common mode and vs
If cm reflection is large You will have resonace due to cm on diff mode transfer function
You should check the common-mode feedback circuit , I think .
Hi,
the common mode noise is most of the time responsible for emc problems. That means high frequency common mode noise is radiated.
One way of damping the common mode only would be to use a bad conductor as the ground. The differential signal traces would still see the good metal, but the common mode which is guided by the ground(s) will be damped.
Best is however to keep the noise small.
This is why LVDS spec includes cm retutn loss
If you have a common mode not connected to good 1.2V of ref-supply, you will get good response.
Added after 1 minutes:
sorry, I meant to say "common mode node" instead of "common mode note"
As I remember LVDS use different impedances to have power consumptation options but did not specify either common mode or differential impedance.
What me surprises is that a obvious good manual
http://www.national.com/appinfo/lvds...ition_2008.pdf
show on page 9 a possible wrong driver reference schematic. The MOS on the lower side switch to ground or a specific signal. The electric difference is that with two lines and two states there are 4 impedances.
Is the LVDS source impedance:
1. <<100 Ohm Common Mode
2. >>100 Ohm Differential Mode
?
or High Impedance (Current Source) for logical high
and Low Impedance (Voltage Source) for logical low
On the other side if the receiver does not have any common-mode termination small differences in the transmitter source currents lead to high common-mode voltage disturbances. I f I assume a spec for the cmd-balance of the transmitter and there is an unspecfied receive-side cmd-impedance the cmd-voltage could go anywhere.
So conclusion will be that there "must" be a low ohmic common-mode transmit impedance. And the receive side "must" be high impedance. Otherwise a special feature, ground bounce, from the chips will not be rejected efficient. Summarize the total picture:
Transmitt:
Zdif>>100Ohm
Zcmd<<100Ohm
Receive:
Zdif=100Ohm
Zcmd>>100Ohm
Hello,
you shouldn't overvalue such "principle" schematics as from the said National document. I would rather regard datasheet specifications as solid facts, although some properties are still left open. From the datasheets, it's clear, that common mode voltage is within narrow bounds arround 1.2V. Thus your conclusions regarding common mode impedance must be basically correct.
Differential receiver impedance is out of doubt, but differential transmitter impedance seems to be almost unspecified. Surely it isn't forbidden to have it at 100 Ohms, but it may be also above or below to my opinion. I noticed, that all manufacturer apparently are avoiding a specification with their LVDS related products. To my opinion, it won't get you anywhere trying to interpret non-information.
It may be interesting to measure empirical impedance properties of LVDS interfaces, but I didn't feel yet a need to.
Regards,
Frank
To came back to the original question. The receive side impedance is clear. So coupled common-mode signals traveling to the receiver are not absorbed. But on transmit side the coupled signal should be arriving at an ideal matched output to the common-mode impedance of the lines.
Passing some hours from the last post I remember a reference schematic with switched resistors. The resistors where also calibrated by selecting a subset of them. Would came closer to the 100 Ohm diff impedance and little higher cmd impedance.