S-parameters: do they include via inductance for common-source FET transistors?
时间:04-04
整理:3721RD
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For example:
http://www.cel.com/pdf/datasheets/ne3511S02.pdf
Reference plane is placed at 1.3mm from device center (at 2.6mm diameter, where leads just touched the substrate).
But also there are substrate parameters given:
Substrate used is t=0.254 mm + many vias to ground on source pins.
All those vias (inductance), is it included in S-parameters?
http://www.cel.com/pdf/datasheets/ne3511S02.pdf
Reference plane is placed at 1.3mm from device center (at 2.6mm diameter, where leads just touched the substrate).
But also there are substrate parameters given:
Substrate used is t=0.254 mm + many vias to ground on source pins.
All those vias (inductance), is it included in S-parameters?
Obviously. The s-parameters are measured with the given fixture.
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