Simulate load pulling of VCO in ADS
I'm trying to simulate the transient behaviour of a PLL in ADS, using the in-built PLL behavioural components ("VCO", "PhaseFreqDetCP", etc.).
I would like to simulate load pulling, i.e. how the VCO/PLL will respond when the VCO load changes. Is this possible?
I guess that, since the model is behavioural, it will not take into account how a changed load would affect the VCO? Especially since I guess how a VCO responds to load pulling will vary between different VCOs. Do I need to use a transistor-level VCO model then, or can I somehow try to "mimic" the effect load pulling would have, without using a transistor-level VCO?
Thanks in advance for any thoughts on the matter.
Best regards,
Martin
No, impossible.
Correct.
Yes.
I can't understand what you want to mean.
What do you want to mean ?
Thank you for your reply.
By mimic, I mean to somehow see an effect similar to what pulling would have on the VCO.
I am not sure exactly how pulling affects the VCO. I guess that one part of it is that when the load isn't matched there will be reflections, and the signal would bounce back and interfere with the VCO signal input to the PFD? So the PFD would see the VCO signal added with an attenuated and phase-shifted version of it (due to the reflections)? I think this should be possible to simulate in ADS? But I guess the VCO is also affected in other ways that are impossible to simulate without a transistor level model.
Best regards,
Martin
This has no direct relation to VCO's load pulling.
However effective load for VCO will be perturbed.
Yes.
You can simulate
- Load pulling effects of VCO
- Perturbation of PFD
Right.
Load pulling effect of VCO is an intrinsic characteristics of VCO alone.
Ok, thank you very much. I will try to simulate the perturbations due to mismatch at least.