RF PAD in 65 nm technology

Hi im new in layout design ,i have a few questions:

1.if i have a transistor which his bulk is connected to a resistor and than to the ground, is that mean that if i have an RF_PAD with a connection to SUB i

need to connect it also through the resistor?

2. i have an RF_PAD with 2 input nets (In,SUB) and 2 input Pins(In,SUB) in the schematic . how should i connect the SUB pin in the layout?

Thanks to all

Ofcourse not!But why you connect the bulk of the MOS to VEE (ground) via a resistor?

It depends on the substrate connection method that your PDK employs.Read the respective manuals/documents.

I connect the transistors bulk to a resistor and than to the ground in order to transfer more power to the load, less power goes to the ground. So, how should i simulate the RF_PAD?

The transistor and the PAD have the same SUB, and the PAD has a pin to the SUB.If i connect the bulk to a resistor and than to the ground doesn't it mean that the SUB of the
PAD is also connected through a resistor?

I am not aware of this technique...Could you explain further or give some reference to study?

If you do this,this is exactly the meaning,so your saying is valid.

I would straightly connect the SUB pin of the PAD to the substrate network via a wire named sub! (global) or whatever name you employ for this.It would be good to reference the technology manuals (or come straightly to a contact with your technology provider),maybe there you can find a substrate connection methodology.For example IBM PDKs provide such info.