HFSS error in Differential pair simulation

Dear all,

I need some help, I am trying to simulate on chip differential pair with certain stack with 7 metal layer above substrate (M7: differential pair signal , M1: is sheilded Ground of this diff. signal then under M1 , there is a substrate.), to export S-parameters from HFSS and import it to cadence.
but when I simulate it with substrate using driven terminal, it gave me warrning "Port refinement, process hf3d: Port '1' has 3 signal conductors with 2 terminals. More signal conductors than terminals can adversely affect the terminal transformations. Please verify conducting boundaries and objects are correctly assigned and touch the port" .

if I simulate same design without substrate , I wouldn't have this warning.

How can I solve this problem?

Also, it's better to solve it in Driven terminal as I did or Driven Model will give more accurate solution?

Thanks in advance.

Cut a little bit signal conductor which is non considered.
The port touches 3 different conductor layer and of course it's not normal.A port should have 2 conductors max.