Problem to import HSPICE model into ADS
时间:03-30
整理:3721RD
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Hi,
I want to simulate the signal integrity of a gigabit tranceiver connection between two virtex 7 fpgas with Agilent ADS.
From our layout tool (Zuken) I get following HSPICE model of the board connection:
************************************************** **************************
* Netlist
************************************************** **************************
.subckt tmp_net tmp_in tmp_out
* Transmission line models
.model DSP1_RAM4_DQ W MODELTYPE=RLGC N=1
+ Lo=4.0055181e-007
+ Co=1.0270473e-010
+ Ro=6.9803922
+ Go=1.0732256e-011
+ Rs=0.001481472
+ Gd=1.0732256e-011
* Transmission lines
W_enet1:TL3 tmp_in GND tmp_out GND
+ RLGCmodel=DSP1_RAM4_DQ N=1 L=0.00070711
.end
This HSPICE model I want to import as a netlist into ADS. Following warning are displayed during reading the HSPICE model in ADS.
Netlist Translator (*) 370.600 Mar 3 2011
IFF translation log
Input format: HSPICE
Input filename: Y:\Sirius\HW\Digitale_HW\ExtBoard2\Board_Simulatio n\ADS_2011\models\test_HSPICE_tmp.sp
Output format: IFF file
Output filename: spice.iff
Special options:
Processing first line as comment.
Begin translation at Mon May 07 13:47:51 2012
Creating schematic with named connections.
Reading item definition file "C:\Agilent\ADS2011_01/config\spctoiff.cfg"
WARNING: Skipping unsupported model type "w", line #32.
WARNING: Skipping unrecognized element type: line #43, "w_enet1:tl3 tmp_in gnd tmp_out gnd rlgcmodel=dsp1_ram4_dq n=1 l=0.00070711".
WARNING: Schematic not created for subcircuit "tmp_net" with no translated components.
Translation completed at Mon May 07 13:47:51 2012.
================================================== ======================
End of Spice Translation Log file, beginning of IFF Translation Log File
================================================== ======================
Beginning IFF import
Processing IFF file: Y:\Sirius\HW\Digitale_HW\ExtBoard2\Board_Simulatio n\ADS_2011\B500R_wrk\spice.iff
WARNING Separator character missing from end of line (line 4):
WARNING No designs to create
IFF import complete
Warnings: 2
What is the reason for that? Does ADS don't understand the model typ 'w'?
Thank you in advance.
Kind regards
Peter
I want to simulate the signal integrity of a gigabit tranceiver connection between two virtex 7 fpgas with Agilent ADS.
From our layout tool (Zuken) I get following HSPICE model of the board connection:
************************************************** **************************
* Netlist
************************************************** **************************
.subckt tmp_net tmp_in tmp_out
* Transmission line models
.model DSP1_RAM4_DQ W MODELTYPE=RLGC N=1
+ Lo=4.0055181e-007
+ Co=1.0270473e-010
+ Ro=6.9803922
+ Go=1.0732256e-011
+ Rs=0.001481472
+ Gd=1.0732256e-011
* Transmission lines
W_enet1:TL3 tmp_in GND tmp_out GND
+ RLGCmodel=DSP1_RAM4_DQ N=1 L=0.00070711
.end
This HSPICE model I want to import as a netlist into ADS. Following warning are displayed during reading the HSPICE model in ADS.
Netlist Translator (*) 370.600 Mar 3 2011
IFF translation log
Input format: HSPICE
Input filename: Y:\Sirius\HW\Digitale_HW\ExtBoard2\Board_Simulatio n\ADS_2011\models\test_HSPICE_tmp.sp
Output format: IFF file
Output filename: spice.iff
Special options:
Processing first line as comment.
Begin translation at Mon May 07 13:47:51 2012
Creating schematic with named connections.
Reading item definition file "C:\Agilent\ADS2011_01/config\spctoiff.cfg"
WARNING: Skipping unsupported model type "w", line #32.
WARNING: Skipping unrecognized element type: line #43, "w_enet1:tl3 tmp_in gnd tmp_out gnd rlgcmodel=dsp1_ram4_dq n=1 l=0.00070711".
WARNING: Schematic not created for subcircuit "tmp_net" with no translated components.
Translation completed at Mon May 07 13:47:51 2012.
================================================== ======================
End of Spice Translation Log file, beginning of IFF Translation Log File
================================================== ======================
Beginning IFF import
Processing IFF file: Y:\Sirius\HW\Digitale_HW\ExtBoard2\Board_Simulatio n\ADS_2011\B500R_wrk\spice.iff
WARNING Separator character missing from end of line (line 4):
WARNING No designs to create
IFF import complete
Warnings: 2
What is the reason for that? Does ADS don't understand the model typ 'w'?
Thank you in advance.
Kind regards
Peter