Synopsys Physical Design CAE(P&R,ICC)
时间：10-02
整理：3721RD
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Synopsys 上海内部职位推荐 有意者可直接发简历至 ynzhou@synopsys.com
Physical Design CAE(P&R, ICC)
Job Description:
Senior Corporate Application Engineer with strong design background to focus on demonstrating superiority of Synopsys Synthesis and Place & Route products.
Responsibilities include EDA software product application & deployment, design methodology development, design implementation RTL2GDS and winning competitive benchmark. Position requires working closely with R&D, product CAE & marketing inside business unit while interfacing with field application consultants & customer outside BU. Must be able to work independently with minimum supervision to complete assignment.
Job Requirement:
BSEE minimum, MSEE preferred with 5+ years of direct hands-on design experience in using both frontend synthesis and backend physical digital design Place & Route required. Must be expert user of Design Compiler and IC Compiler. PrimeTime & ECO experience a plus. Must have good scripting skills. Strong understanding of ASIC design flow, high performance ARM processor design flow desired and hierarchical design methodologies. Self-motivated & independently work alone with strong communication skill, good command of Chinese & English language plus people skill required.
Physical Design CAE(P&R, ICC)
Job Description:
Senior Corporate Application Engineer with strong design background to focus on demonstrating superiority of Synopsys Synthesis and Place & Route products.
Responsibilities include EDA software product application & deployment, design methodology development, design implementation RTL2GDS and winning competitive benchmark. Position requires working closely with R&D, product CAE & marketing inside business unit while interfacing with field application consultants & customer outside BU. Must be able to work independently with minimum supervision to complete assignment.
Job Requirement:
BSEE minimum, MSEE preferred with 5+ years of direct hands-on design experience in using both frontend synthesis and backend physical digital design Place & Route required. Must be expert user of Design Compiler and IC Compiler. PrimeTime & ECO experience a plus. Must have good scripting skills. Strong understanding of ASIC design flow, high performance ARM processor design flow desired and hierarchical design methodologies. Self-motivated & independently work alone with strong communication skill, good command of Chinese & English language plus people skill required.
学习下哈
what is the pay?
filling only
zenme招聘在这里?
realy thanks
thakn you a
hoq many
thank youmuch
这个是一个招聘的广告！
非常感谢，很有用
thanks for sharing