DFF的internal power比switching power要大。为啥?
时间:10-02
整理:3721RD
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GroupInternalSwitchingLeakageTotalPercentage
PowerPowerPowerPower(%)
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Sequential1129.6183.109124.826.56
Macro140.60.718413.84155.133.03
IO002.214e-052.214e-054.713e-06
Combinational38.9489.3221.01149.331.78
Clock (Combinational)3.76233.140.572437.477.977
Clock (Sequential)1.0931.920.071033.0850.6567
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Total296.4134.738.6469.7100
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SRAM的internal确实比switching power要大,这个可以理解。为什么Sequential也是这种情况?望各位大神不吝赐教。detail info: 有些DFF的internal power 比switching power要大,有些相反,没有发现什么规律。
追问一个问题,switching power和input transition有关系吗?计算dynamic power的公式是:Pdyn=CL*Vdd2*Ptrans*fclock Where ƒ is the frequency of transitions, Ptrans is the probability of an output transi-
tion, and ƒclock is the frequency of the system clock.
不明白Ptrans是什么意思?
Ptrans 是节点的翻转率
因为DFF的CK端一直在翻转,D端翻转没CK快,所以inter大于switch
数据翻转率低,时钟翻转率高。