后端好职位（实习生，应届生，engineer和leader）
1. 实习生职位
Magic-semi JD forIntern
Magic-semi is a new startup design servicecompany specialized in backend training, consulting and design service. In magic-semi, design experters with rich experience in advancetechnology nodes from 40nm to 14nm and can deliver complete solutionfrom netlist to GDSII.Magic-semi has good relationship with IC leadingcompany and enables our customer to achieve success in a more efficient,reliable and cost-effective way.
RESPONSIBILITES:
1. Responsible for developing digital designswith emphasis on backend, including Floor-plan, power planning, Place, CTS andRoute.
2. Work with Front-end designers to optimizetiming/area/power of the design implementation and perform static timinganalysis.
3. Optimization and Verification of layoutfor tape-out (including RC extraction, ECO, DRC, LVS).
4. Static Timing analysis (Prime Time or ETS)and setup/hold fix.
Requirements:
1.
CS/EE or background in areas related todigital or analog chip design
2.
Known of IC backend flow.
3.
Known of timing concept.
4.
Have reading and writing skills forenglish
5.
Experience in floorplan, place, cts,route, timing ,pv and power analysis and so on.
6.
Experienced in Synopsys/Cadenceautomatically physical implementation tools and flows (IC-Compiler/ Astro /SOC-Encounter/ Milky-way/ Star-RCX) is a plus.
7.
Experience with one or more scriptinglanguages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.
8.
Experience and knowledge about FE design(RTL code, flow) and verification is a plus.
9.
Good analytical and debugging skills.
Send your CV to hr@magic-semi.com if you are interested.
2.应届生
Magic-semi JD for NCG
Magic-semi is a new startup design servicecompany specialized in backend training, consulting and design service. In magic-semi, design experters with rich experience in advancetechnology nodes from 40nm to 14nm and can deliver complete solutionfrom netlist to GDSII.Magic-semi has good relationship with IC leadingcompany and enables our customer to achieve success in a more efficient,reliable and cost-effective way.
Job Title:
Intern/NCG
RESPONSIBILITES:
1. Responsible for developing digital designswith emphasis on backend, including Floor-plan, power planning, Place, CTS andRoute.
2. Work with Front-end designers to optimize timing/area/powerof the design implementation and perform static timing analysis.
3. Optimization and Verification of layoutfor tape-out (including RC extraction, ECO, DRC, LVS).
4. Static Timing analysis (Prime Time or ETS)and setup/hold fix.
Requirements:
1.
CS/EE or background in areas related todigital or analog chip design
2.
Be familiar with IC backend flow.
3.
Experienced in Synopsys/Cadenceautomatically physical implementation tools and flows (IC-Compiler/ Astro /SOC-Encounter/ Milky-way/ Star-RCX) is a plus.
4.
Experience with one or more scriptinglanguages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.
5.
Experience and knowledge about FE design(RTL code, flow) and verification is a plus.
6.
Good analytical and debugging skills.
Send your CV to hr@magic-semi.com if you are interested.
3. 高级工程师
Magic-semi JD forSenior Engineer
Magic-semi is a new startup design servicecompany specialized in backend training, consulting and design service. In magic-semi, design experters with rich experience in advancetechnology nodes from 40nm to 14nm and can deliver complete solutionfrom netlist to GDSII.Magic-semi has good relationship with IC leadingcompany and enables our customer to achieve success in a more efficient,reliable and cost-effective way.
Job Title：
Senior Engineer
RESPONSIBILITES:
1. Responsible for developing digital designswith emphasis on backend, including Floor-plan, power planning, Place, CTS andRoute.
2. Work with Front-end designers to optimize timing/area/powerof the design implementation and perform static timing analysis.
3. Optimization and Verification of layoutfor tape-out (including RC extraction, ECO, DRC, LVS).
4. Static Timing analysis (Prime Time or ETS)and setup/hold fix.
Requirements:
1.
CS/EE or background in areas related todigital or analog chip design
2.
3 year+ work experience.
3.
experience in floorplan, place, cts,route, timing ,pv and power analysis and so on.
4.
Experienced in Synopsys/Cadenceautomatically physical implementation tools and flows (IC-Compiler/ Astro /SOC-Encounter/ Milky-way/ Star-RCX) is a plus.
5.
Experience with one or more scriptinglanguages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.
6.
Experience and knowledge about FE design(RTL code, flow) and verification is a plus.
7.
Good analytical and debugging skills.
Send your CV to hr@magic-semi.com if you are interested.
4. leader
Magic-semi JD forLeader Engineer
Magic-semi is a new startup design servicecompany specialized in backend training, consulting and design service. In magic-semi, design experters with rich experience in advancetechnology nodes from 40nm to 14nm and can deliver complete solutionfrom netlist to GDSII.Magic-semi has good relationship with IC leadingcompany and enables our customer to achieve success in a more efficient,reliable and cost-effective way.
Job Title:
Leader Engineer
RESPONSIBILITES:
1. Responsible for developing digital designswith emphasis on backend, including Floor-plan, power planning, Place, CTS andRoute.
2. Work with Front-end designers to optimize timing/area/powerof the design implementation and perform static timing analysis.
3. Optimization and Verification of layoutfor tape-out (including RC extraction, ECO, DRC, LVS).
4. Static Timing analysis (Prime Time or ETS)and setup/hold fix.
Requirements:
1.
CS/EE or background in areas related todigital or analog chip design
2.
7 year+ work experience for IC backend.
3.
Experience in floorplan, place, cts,route, timing ,pv and power analysis and so on.
4.
Have experience for project management.
5.
Experienced in Synopsys/Cadenceautomatically physical implementation tools and flows (IC-Compiler/ Astro /SOC-Encounter/ Milky-way/ Star-RCX) is a plus.
6.
Experience with one or more scriptinglanguages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.
7.
Experience and knowledge about FE design(RTL code, flow) and verification is a plus.
8.
Good analytical and debugging skills.
9.
Self-motivated and good team player.
Send your CV to hr@magic-semi.com if you are interested.
进到公司后会有很正规的后端培训，对于实习生来说是一个很好的机会。
在什么地方?
工作地点：上海张江
想转行到IC后端的也是不错的选择，会有非常系统的IC后端培训。
上海张江
公司多少人?
公司刚成立，要招很多人，现在公司的人都是后端很大牛的，而且会给非常系统的培训
卖人头的?还是把项目拿过来自己做?
将来都会有，欢迎发简历到hr@magic-semi.com
实习生，应届生或者想转行从事IC后端行业的是个很好的机会，我们会有非常系统的培训。
pr（physical design IC后端）是目前最火的职位，以后几年之内都是很好的需求，而且这个行业是积累性比较强，工作年限越多越吃香。
只要你有想从事IC后端行业的决心，我们这里给你搭就的是一个让你闯的平台。
零基础的女性要么?
0基础是啥意思，是没有做过后端，还是没有任何微电子专业的知识。
如果对IC后端感兴趣，可以私信我
如果对IC后端感兴趣可以私信我，另外没有性别歧视
如果没有任何经验没有任何微电子相关，只是对后端感兴趣，你们要吗?如何私信你。
请把你的联系方式和简历发到hr@magic-semi.com，如果你对IC后端感兴趣，没有IC基础，我们会安排培训的。
我们是一家培训和服务综合的公司，
针对没有IC基础, 想进入IC行业，或是觉得IC基础不够好，需要加强的，我们专门安排了针对性的课程。
实习和工作是在世界500强大公司，接触的都是IC行业顶尖的东西。
能留个个线上联系方式吗?我想和你先聊聊。
您好，咱们的培训会收取费用吗?
目前公司有多少人?是培训机构还是后端设计公司?
你好，我们是一家后端外包服务公司。
公司刚刚成立。
如果你是实习生或者应届生，或者有电学基础，想转行从事后端行业，可以把简历发到hr@magic-semi.com邮箱，会有技术老师联系你。
发简历到邮箱，就有机会跟技术老师聊聊，如果成为了我们公司的实习生，或者员工，会有专业的，系统的后端培训，是不需要花钱的。
技术老师就是我们公司的后端技术大牛，牛人。
哦，前面你说是培训服务公司，我以为是培训然后推荐就业的呢。
公司规模方便透露吗?是注册的公司吗?
是注册的正规公司
公司什么名字 网址都没有 不知道任何信息，让大家怎么放心啊?刚成立的更应该宣传扩大知名度啊
想转PR的，要不要啊。
大四实习想做数字后端 求推荐