请教一个LVS的问题

各位大侠，小弟在做LVS的时候遇到了一个很奇怪的问题。网表里面的一个D触发器，foundry给的标准单元里的core cell 网表是没有二极管的，但是这个触发器的GDS文件显示有两个寄生的二极管，这样在做LVS的时候就说我的source网表里缺少二极管，请问这个问题怎么解决。还是我哪里弄错了，下面是LVS的report
Error:Different numbers of instances (see below).
LAYOUT CELL NAME:QDFFRBN
SOURCE CELL NAME:QDFFRBN
--------------------------------------------------------------------------------------------------------------
INITIAL NUMBERS OF OBJECTS
--------------------------
LayoutSourceComponent Type
--------------------------
Ports:66
Nets:1717
Instances:1414MN (4 pins)
1414MP (4 pins)
20*D (2 pins)
------------
Total Inst:3028

NUMBERS OF OBJECTS AFTER TRANSFORMATION
---------------------------------------
LayoutSourceComponent Type
--------------------------
Ports:66
Nets:1515
Instances:44MN (4 pins)
44MP (4 pins)
20*D (2 pins)
66INV (2 pins)
22NAND2 (3 pins)
------------
Total Inst:1816

* = Number of objects in layout different from number in source.

**************************************************************************************************************
INCORRECT OBJECTS
**************************************************************************************************************

LEGEND:
-------
ne= Naming Error (same layout name found in source
circuit, but object was matched otherwise).

**************************************************************************************************************
INCORRECT INSTANCES
DISC#LAYOUT NAMESOURCE NAME
**************************************************************************************************************
1D0(0.880,1.980)D(DION_EE2_UCFNLL)** missing instance **
pos: GND:G** GND **
neg: D:ID** D **
--------------------------------------------------------------------------------------------------------------
2D1(1.190,1.100)D(DION_EE2_UCFNLL)** missing instance **
pos: GND:G** GND **
neg: CK:ID** CK **

**************************************************************************************************************
INFORMATION AND WARNINGS
**************************************************************************************************************

MatchedMatchedUnmatchedUnmatchedComponent
LayoutSourceLayoutSourceType
-----------------------------------------
Ports:6600
Nets:151500
Instances:4400MN(N_18_EE2_UCFNLL)
4400MP(P_18_EE2_UCFNLL)
0020D(DION_EE2_UCFNLL)
6600INV
2200NAND2
--------------------------------
Total Inst:161620

o Layout Names That Are Missing In The Source:
Ports:VCC GND:G D:ID CK:ID RB:I Q:O
Nets:VCC GND:G D:ID CK:ID RB:I Q:O

估计是增加的防天线效应的二极管。

但是这个二极管是这个D触发器单元内部的二极管，foundry提供的core cell 网表的这个D触发器网表里面没有这个二极管

runset里面可以打开了抽取parasitic diode的选项，看看