求助大神们cadence RTL compiler的问题!
时间:10-02
整理:3721RD
点击:
最近用RTL compiler综合电路的时候,发现用read_hdl命令读取源程序总是默认为verilog程序,如何设置才认为是vhd文件呢?
command:set_attribute hdl_language {v1995 | v2001| vhdl |sv}
hdl_language
hdl_language {v1995 | v2001 |vhdl |sv}
Default: v1995
Read-write root attribute. Specifies the default hdl language mode assumed when you run the read_hdl command without specifying the language mode.
Note:This attribute is supported only in the RTL flow.