lvs抽取网表过程中ERC错误
时间：10-02
整理：3721RD
点击：
各位朋友：
小弟在用hercules做130nm工艺版图的LVS分析过程中，发现.LAYTOU_ERROR文件中出现一个ERC错误，该错误应该是指出
不能存在源极连接至电源和漏极连接至地（漏极连接至电源和源极连接至地）的MOS管。但我想不通为什么不能存在这种MOS管，
还请有经验的“大虾”指点一二。
在此谢过！
关于该ERC错误在抽取错误报告文件里内容如下：
ERROR SUMMARY
ERC report: MOS N12 S/D connect to both Power and Ground nets.
BOOLEAN nsd2p AND nsd2g { } PERM=nsd_to_PG(1;4) ........ 44 violations found.
ERC report: MOS P12 S/D connect to both Power and Ground nets.
BOOLEAN psd2p AND psd2g { } PERM=psd_to_PG(1;5) ........ 23 violations found.
#####--- ERR_BOOLEAN_AND -----------------------------------
BOOLEAN nsd2p AND nsd2g {
COMMENT = "ERC report: MOS N12 S/D connect to both Power and Ground nets."
VERBOSE=TRUE } PERM=nsd_to_PG(1;4)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Structure( lower left x, y ) ( upper right x, y )
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
PVDD1(3.020, 31.380) (3.200, 59.380)
PVDD1(9.210, 31.380) (9.390, 59.380)
PVDD1(10.550, 31.380) (10.730, 59.380)
PVDD1(16.740, 31.380) (16.920, 59.380)
PVDD1(18.080, 31.380) (18.260, 59.380)
PVDD1(24.270, 31.380) (24.450, 59.380)
PVDD1(25.610, 31.380) (25.790, 59.380)
PVDD1(31.800, 31.380) (31.980, 59.380)
PVDD1(31.800, 1.860) (31.980, 29.860)
PVDD1(25.610, 1.860) (25.790, 29.860)
PVDD1(24.270, 1.860) (24.450, 29.860)
PVDD1(18.080, 1.860) (18.260, 29.860)
PVDD1(16.740, 1.860) (16.920, 29.860)
PVDD1(10.550, 1.860) (10.730, 29.860)
PVDD1(9.210, 1.860) (9.390, 29.860)
PVDD1(3.020, 1.860) (3.200, 29.860)
PVDD1CE(6.785, 114.815) (6.965, 142.815)
PVDD1CE(12.975, 114.815) (13.155, 142.815)
PVDD1CE(14.315, 114.815) (14.495, 142.815)
PVDD1CE(20.505, 114.815) (20.685, 142.815)
PVDD1CE(21.845, 114.815) (22.025, 142.815)
PVDD1CE(28.035, 114.815) (28.215, 142.815)
PVDD1CE(6.785, 85.295) (6.965, 113.295)
PVDD1CE(12.975, 85.295) (13.155, 113.295)
PVDD1CE(14.315, 85.295) (14.495, 113.295)
PVDD1CE(20.505, 85.295) (20.685, 113.295)
PVDD1CE(21.845, 85.295) (22.025, 113.295)
PVDD1CE(28.035, 85.295) (28.215, 113.295)
PVDD1CE(3.020, 1.860) (3.200, 29.860)
PVDD1CE(9.210, 1.860) (9.390, 29.860)
PVDD1CE(10.550, 1.860) (10.730, 29.860)
PVDD1CE(16.740, 1.860) (16.920, 29.860)
PVDD1CE(18.080, 1.860) (18.260, 29.860)
PVDD1CE(24.270, 1.860) (24.450, 29.860)
PVDD1CE(31.800, 1.860) (31.980, 29.860)
PVDD1CE(25.610, 1.860) (25.790, 29.860)
PVDD1CE(3.020, 31.380) (3.200, 59.380)
PVDD1CE(9.210, 31.380) (9.390, 59.380)
PVDD1CE(10.550, 31.380) (10.730, 59.380)
PVDD1CE(16.740, 31.380) (16.920, 59.380)
PVDD1CE(18.080, 31.380) (18.260, 59.380)
PVDD1CE(24.270, 31.380) (24.450, 59.380)
PVDD1CE(31.800, 31.380) (31.980, 59.380)
PVDD1CE(25.610, 31.380) (25.790, 59.380)
#####--- ERR_BOOLEAN_AND -----------------------------------
BOOLEAN psd2p AND psd2g {
COMMENT = "ERC report: MOS P12 S/D connect to both Power and Ground nets."
VERBOSE=TRUE } PERM=psd_to_PG(1;5)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Structure( lower left x, y ) ( upper right x, y )
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
route_2013_3_19_text(921.050, 2188.215) (921.180, 2189.495)
route_2013_3_19_text(920.475, 2188.215) (920.605, 2189.495)
route_2013_3_19_text(919.965, 2188.215) (920.095, 2189.495)
route_2013_3_19_text(2275.905, 507.785) (2276.035, 509.085)
route_2013_3_19_text(2276.445, 507.785) (2276.575, 510.385)
route_2013_3_19_text(2276.955, 507.785) (2277.085, 509.085)
route_2013_3_19_text(2277.465, 507.785) (2277.595, 509.085)
route_2013_3_19_text(2277.975, 507.785) (2278.105, 509.085)
route_2013_3_19_text(2278.485, 507.785) (2278.615, 509.085)
route_2013_3_19_text(2278.995, 507.785) (2279.125, 509.085)
route_2013_3_19_text(2279.505, 507.785) (2279.635, 509.085)
route_2013_3_19_text(2280.020, 507.785) (2280.150, 509.085)
route_2013_3_19_text(2280.530, 507.985) (2280.660, 509.085)
route_2013_3_19_text(716.045, 500.405) (716.175, 501.705)
route_2013_3_19_text(716.585, 500.405) (716.715, 503.005)
route_2013_3_19_text(717.095, 500.405) (717.225, 501.705)
route_2013_3_19_text(717.605, 500.405) (717.735, 501.705)
route_2013_3_19_text(718.115, 500.405) (718.245, 501.705)
route_2013_3_19_text(718.625, 500.405) (718.755, 501.705)
route_2013_3_19_text(719.135, 500.405) (719.265, 501.705)
route_2013_3_19_text(719.645, 500.405) (719.775, 501.705)
route_2013_3_19_text(720.160, 500.405) (720.290, 501.705)
route_2013_3_19_text(720.670, 500.605) (720.800, 501.705)
其中P*单元都是IO单元，route_2013_3_19_text是我版图的顶层
小弟在用hercules做130nm工艺版图的LVS分析过程中，发现.LAYTOU_ERROR文件中出现一个ERC错误，该错误应该是指出
不能存在源极连接至电源和漏极连接至地（漏极连接至电源和源极连接至地）的MOS管。但我想不通为什么不能存在这种MOS管，
还请有经验的“大虾”指点一二。
在此谢过！
关于该ERC错误在抽取错误报告文件里内容如下：
ERROR SUMMARY
ERC report: MOS N12 S/D connect to both Power and Ground nets.
BOOLEAN nsd2p AND nsd2g { } PERM=nsd_to_PG(1;4) ........ 44 violations found.
ERC report: MOS P12 S/D connect to both Power and Ground nets.
BOOLEAN psd2p AND psd2g { } PERM=psd_to_PG(1;5) ........ 23 violations found.
#####--- ERR_BOOLEAN_AND -----------------------------------
BOOLEAN nsd2p AND nsd2g {
COMMENT = "ERC report: MOS N12 S/D connect to both Power and Ground nets."
VERBOSE=TRUE } PERM=nsd_to_PG(1;4)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Structure( lower left x, y ) ( upper right x, y )
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
PVDD1(3.020, 31.380) (3.200, 59.380)
PVDD1(9.210, 31.380) (9.390, 59.380)
PVDD1(10.550, 31.380) (10.730, 59.380)
PVDD1(16.740, 31.380) (16.920, 59.380)
PVDD1(18.080, 31.380) (18.260, 59.380)
PVDD1(24.270, 31.380) (24.450, 59.380)
PVDD1(25.610, 31.380) (25.790, 59.380)
PVDD1(31.800, 31.380) (31.980, 59.380)
PVDD1(31.800, 1.860) (31.980, 29.860)
PVDD1(25.610, 1.860) (25.790, 29.860)
PVDD1(24.270, 1.860) (24.450, 29.860)
PVDD1(18.080, 1.860) (18.260, 29.860)
PVDD1(16.740, 1.860) (16.920, 29.860)
PVDD1(10.550, 1.860) (10.730, 29.860)
PVDD1(9.210, 1.860) (9.390, 29.860)
PVDD1(3.020, 1.860) (3.200, 29.860)
PVDD1CE(6.785, 114.815) (6.965, 142.815)
PVDD1CE(12.975, 114.815) (13.155, 142.815)
PVDD1CE(14.315, 114.815) (14.495, 142.815)
PVDD1CE(20.505, 114.815) (20.685, 142.815)
PVDD1CE(21.845, 114.815) (22.025, 142.815)
PVDD1CE(28.035, 114.815) (28.215, 142.815)
PVDD1CE(6.785, 85.295) (6.965, 113.295)
PVDD1CE(12.975, 85.295) (13.155, 113.295)
PVDD1CE(14.315, 85.295) (14.495, 113.295)
PVDD1CE(20.505, 85.295) (20.685, 113.295)
PVDD1CE(21.845, 85.295) (22.025, 113.295)
PVDD1CE(28.035, 85.295) (28.215, 113.295)
PVDD1CE(3.020, 1.860) (3.200, 29.860)
PVDD1CE(9.210, 1.860) (9.390, 29.860)
PVDD1CE(10.550, 1.860) (10.730, 29.860)
PVDD1CE(16.740, 1.860) (16.920, 29.860)
PVDD1CE(18.080, 1.860) (18.260, 29.860)
PVDD1CE(24.270, 1.860) (24.450, 29.860)
PVDD1CE(31.800, 1.860) (31.980, 29.860)
PVDD1CE(25.610, 1.860) (25.790, 29.860)
PVDD1CE(3.020, 31.380) (3.200, 59.380)
PVDD1CE(9.210, 31.380) (9.390, 59.380)
PVDD1CE(10.550, 31.380) (10.730, 59.380)
PVDD1CE(16.740, 31.380) (16.920, 59.380)
PVDD1CE(18.080, 31.380) (18.260, 59.380)
PVDD1CE(24.270, 31.380) (24.450, 59.380)
PVDD1CE(31.800, 31.380) (31.980, 59.380)
PVDD1CE(25.610, 31.380) (25.790, 59.380)
#####--- ERR_BOOLEAN_AND -----------------------------------
BOOLEAN psd2p AND psd2g {
COMMENT = "ERC report: MOS P12 S/D connect to both Power and Ground nets."
VERBOSE=TRUE } PERM=psd_to_PG(1;5)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
Structure( lower left x, y ) ( upper right x, y )
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
route_2013_3_19_text(921.050, 2188.215) (921.180, 2189.495)
route_2013_3_19_text(920.475, 2188.215) (920.605, 2189.495)
route_2013_3_19_text(919.965, 2188.215) (920.095, 2189.495)
route_2013_3_19_text(2275.905, 507.785) (2276.035, 509.085)
route_2013_3_19_text(2276.445, 507.785) (2276.575, 510.385)
route_2013_3_19_text(2276.955, 507.785) (2277.085, 509.085)
route_2013_3_19_text(2277.465, 507.785) (2277.595, 509.085)
route_2013_3_19_text(2277.975, 507.785) (2278.105, 509.085)
route_2013_3_19_text(2278.485, 507.785) (2278.615, 509.085)
route_2013_3_19_text(2278.995, 507.785) (2279.125, 509.085)
route_2013_3_19_text(2279.505, 507.785) (2279.635, 509.085)
route_2013_3_19_text(2280.020, 507.785) (2280.150, 509.085)
route_2013_3_19_text(2280.530, 507.985) (2280.660, 509.085)
route_2013_3_19_text(716.045, 500.405) (716.175, 501.705)
route_2013_3_19_text(716.585, 500.405) (716.715, 503.005)
route_2013_3_19_text(717.095, 500.405) (717.225, 501.705)
route_2013_3_19_text(717.605, 500.405) (717.735, 501.705)
route_2013_3_19_text(718.115, 500.405) (718.245, 501.705)
route_2013_3_19_text(718.625, 500.405) (718.755, 501.705)
route_2013_3_19_text(719.135, 500.405) (719.265, 501.705)
route_2013_3_19_text(719.645, 500.405) (719.775, 501.705)
route_2013_3_19_text(720.160, 500.405) (720.290, 501.705)
route_2013_3_19_text(720.670, 500.605) (720.800, 501.705)
其中P*单元都是IO单元，route_2013_3_19_text是我版图的顶层
一般的ERC Check中是会报出来的....这种接法一般的工艺是可以存在的...你可以问问factory....你先去问一下做电路的设计人员是不是要这样接...有的SRAM中的接口处也有这样接的结构....