芯得职位-视频编解码 算法 架构 IC design和Verification
时间:12-12
整理:3721RD
点击:
ASIC Design IP Core H.264 MPEG
简历发 offer@hi-talent.net
职位职能: 高级硬件工程师
职位描述:
Position Description:
The candidate will be the part of the design team for the development of next generation of video codec IP, the responsibilities include:
1.Micro-architecture definition;
2.Logic implementation with Verilog HDL;
3.Block-level verification;
4.Synthesis and pre-layout/post-layout timing closure;
5.Power analysis and reduction;
6.FPGA prototyping and debugging;
Qualification:
7.BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;
8.Expect elf-motivation and team player;
9.Solid skills and rich experiences in logic design, synthesis and timing analysis;
10.Hands-on engineering experiences in video codec development, familiar with video coding standard such like H.264/AVC, MPEG-4, AVS etc.;
11.Familiar with all front-end flows including LINT check, simulation, synthesis, STA, formal and power analysis, etc.;
12.Knowledge and experiences in Computer Architecture and RISC processor (ARM/MIPS/SPARC) micro-architecture would be a great plus;
13.Familiar with AXI4/AXI3 protocol, memory controller would be a plus;
14.Experience in FPGA prototyping and debugging would be a plush;
5. Senior video architecture
简历发芯得爱德华 offer@hi-talent.net
Position Description:
The video architect will be working closely with the algorithm team and design team for development of next generation video codec IP, the responsibility includes::
1.Work with algorithm team to develop the C Model for video decoder/encoder of H.265/HEVC;
2.Work with design team for the micro-architecture definition of video codec IP for H.265/HEVC;
3.Develop video testing framework for Video codec IP performance evaluation, analysis and tuning;
Qualification:
4.BS with 5+ years or MS/Ph.D with 2+ years experiences in electronic engineering/computer science;
5.Proactive, creative and team player;
6.Proficient in video and image processing techniques, in-depth understanding of algorithm and implementation for video coding standards such as MPEG-2, MPEG-4, H.263, H.264/AVC;
7.Proven related engineering experiences in architecture/micro-architecture definition for video codec development with successful tape-outs/production;
8.Solid programming skills with C/C++;
9.Knowledge/experiences of computer architecture is a plus;
6. (Sr.) ASIC Design Verification Engineer
简历发 offer@hi-talent.net
Position Description:
As part of the IP design team, the candidate will be responsible for the pre-silicon verification of in-house designed micro-processor which is a built-in component for next generation video codec IP, including:
o Build up and maintain verification environment, including development of testbench and test generators for block-level and full-chip level simulation;
o Develop and execute functional verification test plans, include writing tests, developing behavioral checkers and coverage/code monitors; Analyze coverage gaps and devise strategies to fill coverage holes;
o Work with designers to debug failing tests and resolve bugs;
o Help develop and maintain flows/scripts/tools for front-end design/verification;
Qualification:
o BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;
o Self-motivated team player, with strong problem resolving skills;
o Proficient and experienced in high-level verification methodology (VMM/UVM/OVM), Verilog-HDL, and hardware verification language (SystemC/SystemVerilog);
o Familiar with video coding standard, and/or computer architecture/micro-architecture;
oHands-on experienced in CPU verification, including test plan and test bench development, test case development and test coverage assessment would be a great plus;
o Experiences in assembly programming, and using scripting languages (Perl/Tcl/Bash/Csh) for flow automation;
o Familiar with front-end ASIC design flow;
视频研究工程师
简历发芯得爱德华 offer@hi-talent.net
工作职责:从事视频多媒体技术的研究和产品研发工作
任职要求:
1、计算机等相关专业,本科学历3年工作经验,或硕士学历1年工作经验;
2、精通C/C++,有GPGPU开发经验者优先;
3、熟悉视频压缩理论,对视频压缩算法有独到的理解,熟悉常用的视频压缩标准:MPEG1/2/4,H263/H264,HEVC;
4、2年以上视频编解码项目经验,有H264,HEVC(H.265)编解码开发经验者优先;
5、良好的英语读写能力;
6、具有快速学习新知识、攻克技术难关的能力;
7、具有良好的团队协作、沟通能力、概括抽象能力。
1. video codec 资深前端设计经理
简历发芯得爱德华 offer@hi-talent.net
岗位职责:
1. 负责带领设计团队将视频,图像处理和编解码算法在FPGA上高效实现;
2. 负责相关IP core的后端设计的技术支持;
3. 技术团队的组织和日常管理
岗位要求:
1. 电子、微电子或相关专业,5年以上集成电路设计工作经验;
2. 精通数字集成电路设计编程语言verilog;
3. 熟悉数字前端IC设计流程;
4. 熟练使用Cadence, Synopsys等相关的EDA设计工具;
5. 熟悉视频编解码的技术标准
6. 良好的中英文表达能力和交流能力.
资深视频研发工程师职位 2 名:
1. 精通 C/C++,有GPGPU开发经验优先
2. 熟悉视频压缩理论,对视频压缩算法有独到的理解,熟悉常用的视频压缩标准(MPEG1/2/4,H263/H264,HEVC)
3. 有不低于2年的视频编解码项目经验,有H264,HEVC(H.265)编解码开发经验优先
4. 本科以上学历且3年工作经验,或硕士生学历1年工作经验
5. 良好的英语阅读能力
2.IC verification engineer(video)
Verification Video 简历发 芯得爱德华 offer@hi-talent.net
职位职能: 高级硬件工程师
职位描述:
Job responsibilities:
The candidate will take part in HEVC/H265 video codec IP development team as verification player. He or she will take part of these responsibilities:
1. Co-work with architect and designers to understand architecture specification and micro architecture specification.
2. Extract features or test points from specifications to work out detail test plans.
3. Develop verification environment and components, like test bench, models, checkers, monitors etc.
4. Discuss with architect and designers to develop test cases, including corner cases.
5. Understand cmodel and dump necessary data for stimulus and golden reference.
6. Co-work with designers to debug failed tests.
7. Develop and improve scripts for regression system, flow automation etc.
8. Analyze coverage and fill uncovered holes.
Job requirements:
1. 3+ years experience with Master degree, or 5+ years experience with Bachelor degree.
2. Video codec ASIC experience and knowledge, like MPEG2/4, H264, etc. HEVC/H265 would be a big plus.
3. Veteran in ASIC verification, especially in UVM/SystemVerilog/SystemC etc.
4. Familiar with scripts, like perl/shell/Makefile and Linux OS.
5. Solid C/C++ knowledge and experience in modeling would be a big plus.
6. Good team player and quick learner, self motive and quick problem solving skills.
7. Fluent oral and written English.
Best Regards
Jane.Jin 金娟
Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
上海芯得企业管理咨询有限公司
上海芯相会企业管理咨询有限公司
Mob: 18502155252
E-Mail: Jane-Jin@hi-talent.com
微信: xinde_jane
QQ: 1600548210
Weibo: http://weibo.com/u/1716864892
webside: www.hi-talent.cn
简历发 offer@hi-talent.net
职位职能: 高级硬件工程师
职位描述:
Position Description:
The candidate will be the part of the design team for the development of next generation of video codec IP, the responsibilities include:
1.Micro-architecture definition;
2.Logic implementation with Verilog HDL;
3.Block-level verification;
4.Synthesis and pre-layout/post-layout timing closure;
5.Power analysis and reduction;
6.FPGA prototyping and debugging;
Qualification:
7.BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;
8.Expect elf-motivation and team player;
9.Solid skills and rich experiences in logic design, synthesis and timing analysis;
10.Hands-on engineering experiences in video codec development, familiar with video coding standard such like H.264/AVC, MPEG-4, AVS etc.;
11.Familiar with all front-end flows including LINT check, simulation, synthesis, STA, formal and power analysis, etc.;
12.Knowledge and experiences in Computer Architecture and RISC processor (ARM/MIPS/SPARC) micro-architecture would be a great plus;
13.Familiar with AXI4/AXI3 protocol, memory controller would be a plus;
14.Experience in FPGA prototyping and debugging would be a plush;
5. Senior video architecture
简历发芯得爱德华 offer@hi-talent.net
Position Description:
The video architect will be working closely with the algorithm team and design team for development of next generation video codec IP, the responsibility includes::
1.Work with algorithm team to develop the C Model for video decoder/encoder of H.265/HEVC;
2.Work with design team for the micro-architecture definition of video codec IP for H.265/HEVC;
3.Develop video testing framework for Video codec IP performance evaluation, analysis and tuning;
Qualification:
4.BS with 5+ years or MS/Ph.D with 2+ years experiences in electronic engineering/computer science;
5.Proactive, creative and team player;
6.Proficient in video and image processing techniques, in-depth understanding of algorithm and implementation for video coding standards such as MPEG-2, MPEG-4, H.263, H.264/AVC;
7.Proven related engineering experiences in architecture/micro-architecture definition for video codec development with successful tape-outs/production;
8.Solid programming skills with C/C++;
9.Knowledge/experiences of computer architecture is a plus;
6. (Sr.) ASIC Design Verification Engineer
简历发 offer@hi-talent.net
Position Description:
As part of the IP design team, the candidate will be responsible for the pre-silicon verification of in-house designed micro-processor which is a built-in component for next generation video codec IP, including:
o Build up and maintain verification environment, including development of testbench and test generators for block-level and full-chip level simulation;
o Develop and execute functional verification test plans, include writing tests, developing behavioral checkers and coverage/code monitors; Analyze coverage gaps and devise strategies to fill coverage holes;
o Work with designers to debug failing tests and resolve bugs;
o Help develop and maintain flows/scripts/tools for front-end design/verification;
Qualification:
o BS with 5+ years or MS with 2+ years experiences in electronic engineering/micro-electronics;
o Self-motivated team player, with strong problem resolving skills;
o Proficient and experienced in high-level verification methodology (VMM/UVM/OVM), Verilog-HDL, and hardware verification language (SystemC/SystemVerilog);
o Familiar with video coding standard, and/or computer architecture/micro-architecture;
oHands-on experienced in CPU verification, including test plan and test bench development, test case development and test coverage assessment would be a great plus;
o Experiences in assembly programming, and using scripting languages (Perl/Tcl/Bash/Csh) for flow automation;
o Familiar with front-end ASIC design flow;
视频研究工程师
简历发芯得爱德华 offer@hi-talent.net
工作职责:从事视频多媒体技术的研究和产品研发工作
任职要求:
1、计算机等相关专业,本科学历3年工作经验,或硕士学历1年工作经验;
2、精通C/C++,有GPGPU开发经验者优先;
3、熟悉视频压缩理论,对视频压缩算法有独到的理解,熟悉常用的视频压缩标准:MPEG1/2/4,H263/H264,HEVC;
4、2年以上视频编解码项目经验,有H264,HEVC(H.265)编解码开发经验者优先;
5、良好的英语读写能力;
6、具有快速学习新知识、攻克技术难关的能力;
7、具有良好的团队协作、沟通能力、概括抽象能力。
1. video codec 资深前端设计经理
简历发芯得爱德华 offer@hi-talent.net
岗位职责:
1. 负责带领设计团队将视频,图像处理和编解码算法在FPGA上高效实现;
2. 负责相关IP core的后端设计的技术支持;
3. 技术团队的组织和日常管理
岗位要求:
1. 电子、微电子或相关专业,5年以上集成电路设计工作经验;
2. 精通数字集成电路设计编程语言verilog;
3. 熟悉数字前端IC设计流程;
4. 熟练使用Cadence, Synopsys等相关的EDA设计工具;
5. 熟悉视频编解码的技术标准
6. 良好的中英文表达能力和交流能力.
资深视频研发工程师职位 2 名:
1. 精通 C/C++,有GPGPU开发经验优先
2. 熟悉视频压缩理论,对视频压缩算法有独到的理解,熟悉常用的视频压缩标准(MPEG1/2/4,H263/H264,HEVC)
3. 有不低于2年的视频编解码项目经验,有H264,HEVC(H.265)编解码开发经验优先
4. 本科以上学历且3年工作经验,或硕士生学历1年工作经验
5. 良好的英语阅读能力
2.IC verification engineer(video)
Verification Video 简历发 芯得爱德华 offer@hi-talent.net
职位职能: 高级硬件工程师
职位描述:
Job responsibilities:
The candidate will take part in HEVC/H265 video codec IP development team as verification player. He or she will take part of these responsibilities:
1. Co-work with architect and designers to understand architecture specification and micro architecture specification.
2. Extract features or test points from specifications to work out detail test plans.
3. Develop verification environment and components, like test bench, models, checkers, monitors etc.
4. Discuss with architect and designers to develop test cases, including corner cases.
5. Understand cmodel and dump necessary data for stimulus and golden reference.
6. Co-work with designers to debug failed tests.
7. Develop and improve scripts for regression system, flow automation etc.
8. Analyze coverage and fill uncovered holes.
Job requirements:
1. 3+ years experience with Master degree, or 5+ years experience with Bachelor degree.
2. Video codec ASIC experience and knowledge, like MPEG2/4, H264, etc. HEVC/H265 would be a big plus.
3. Veteran in ASIC verification, especially in UVM/SystemVerilog/SystemC etc.
4. Familiar with scripts, like perl/shell/Makefile and Linux OS.
5. Solid C/C++ knowledge and experience in modeling would be a big plus.
6. Good team player and quick learner, self motive and quick problem solving skills.
7. Fluent oral and written English.
Best Regards
Jane.Jin 金娟
Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
上海芯得企业管理咨询有限公司
上海芯相会企业管理咨询有限公司
Mob: 18502155252
E-Mail: Jane-Jin@hi-talent.com
微信: xinde_jane
QQ: 1600548210
Weibo: http://weibo.com/u/1716864892
webside: www.hi-talent.cn