招MIPS CPU Design Verification Engineer-2013.12
时间：12-12
整理：3721RD
点击：
代发，请勿回站内。如果有意或者朋友有意，请直接发送简历到highspeedlowpower@qq.com
某外资顶级芯片公司招聘DV Engineer和后端工程师,该公司薪水高待遇优工作氛围轻松自由，能
学到很多东西，提升自己的价值。公司开发的IP现在进入了包括苹果在内的主流厂商，现在处于
高速发展期，前景一片光明。
DV Engineer需要最好硕士以上学历，三年以上工作经验，具体要求见下：
Position: MIPS CPU Design Verification Engineer
Responsibility:
Development and verification of MIPS microprocessor cores and products.
Knowledge/Skills:
- Strong microprocessor architecture and micro-architecture knowledge.
- Understanding of MIPS architecture is preferred.
- Good logic and RTL design skills.
- Experienced with CPU design verification, debug, and testing methodologies.
- Good knowledge of common test methods and techniques (ie: regression, functional, random, structural, emulation ...)
- Experienced with building test environments, test benches, checkers, test vectors, assertions, coverage analysis, ...
- Good programming and scripting skills, such as Verilog, System Verilog, assembler, Perl, Shell scripts, C, TCL, Windows Office, ...etc
Requirements:
- Education : BS in EE or CS (MS or higher preferred).
- Experience : Four years experience or more in related area.
- Systems : Unix, Linux, Windows.
- Language : Good English verbal skills plus reading/writing for documentation.
- Spirit : Good team spirit, professional, motivated and eager to learn combined with natural curiosity "to discover", "to know" and an attitude "to fix a problem".
该公司同时还有后端职位开出，后端职位需要1～3年工作经验，具体JD如下：
Position: CPU Core Backend Design Engineer
Main Job Function:
- Backend ASCII development of MIPS CPU cores.
Knowledge Requirements:
- Experienced with backend ASIC design and integration flow knowledge.
- Experienced with common EDA Tools flow, ie: Synopsys/Cadence/Magma
- Experienced tape out flow and physical design verification.
- Experienced in 3rd party IP (standard cell, memory compiler) usage.
- Strong programming (TCL, Perl, shell script, C) skills.
- Strong IT architecture knowledge with setup/configure experience.
- Basic understanding of CMOS VLSI IC design and DFT knowledge.
- Basic logic/RTL design and microprocessor knowledge.
- Basic skills in Linux, PC window setup.
- Language: Good English read/write.
- Experience: Two years experience or more in related area.
- Education: BS in EE or CS or Physics (MS or higher preferred).
Duties:
- Define/install/implement Core/Chip design flow and methodology.
- ASCII Reference Flow verification and tuning.
- Product Datapoint analyses.
- Develop hard IP and tape out test chips via EDA flow.
- Cad support, IP and license management.
- General IT setup, implementation and maintenance support.
某外资顶级芯片公司招聘DV Engineer和后端工程师,该公司薪水高待遇优工作氛围轻松自由，能
学到很多东西，提升自己的价值。公司开发的IP现在进入了包括苹果在内的主流厂商，现在处于
高速发展期，前景一片光明。
DV Engineer需要最好硕士以上学历，三年以上工作经验，具体要求见下：
Position: MIPS CPU Design Verification Engineer
Responsibility:
Development and verification of MIPS microprocessor cores and products.
Knowledge/Skills:
- Strong microprocessor architecture and micro-architecture knowledge.
- Understanding of MIPS architecture is preferred.
- Good logic and RTL design skills.
- Experienced with CPU design verification, debug, and testing methodologies.
- Good knowledge of common test methods and techniques (ie: regression, functional, random, structural, emulation ...)
- Experienced with building test environments, test benches, checkers, test vectors, assertions, coverage analysis, ...
- Good programming and scripting skills, such as Verilog, System Verilog, assembler, Perl, Shell scripts, C, TCL, Windows Office, ...etc
Requirements:
- Education : BS in EE or CS (MS or higher preferred).
- Experience : Four years experience or more in related area.
- Systems : Unix, Linux, Windows.
- Language : Good English verbal skills plus reading/writing for documentation.
- Spirit : Good team spirit, professional, motivated and eager to learn combined with natural curiosity "to discover", "to know" and an attitude "to fix a problem".
该公司同时还有后端职位开出，后端职位需要1～3年工作经验，具体JD如下：
Position: CPU Core Backend Design Engineer
Main Job Function:
- Backend ASCII development of MIPS CPU cores.
Knowledge Requirements:
- Experienced with backend ASIC design and integration flow knowledge.
- Experienced with common EDA Tools flow, ie: Synopsys/Cadence/Magma
- Experienced tape out flow and physical design verification.
- Experienced in 3rd party IP (standard cell, memory compiler) usage.
- Strong programming (TCL, Perl, shell script, C) skills.
- Strong IT architecture knowledge with setup/configure experience.
- Basic understanding of CMOS VLSI IC design and DFT knowledge.
- Basic logic/RTL design and microprocessor knowledge.
- Basic skills in Linux, PC window setup.
- Language: Good English read/write.
- Experience: Two years experience or more in related area.
- Education: BS in EE or CS or Physics (MS or higher preferred).
Duties:
- Define/install/implement Core/Chip design flow and methodology.
- ASCII Reference Flow verification and tuning.
- Product Datapoint analyses.
- Develop hard IP and tape out test chips via EDA flow.
- Cad support, IP and license management.
- General IT setup, implementation and maintenance support.
最近版上发了很多验证的职位，验证的同学有福了。后端的需求也不少，设计类的职位要加油哦～～～～～
谢谢发出简历的朋友，请耐心等待，来信必复～～
谢谢关注的和发送简历的朋友。请耐心等待，静候佳音～～
这个岗位继续招聘。需要3～5年工作经验，最好是硕士学历～～
Xmart Semiconductor
这公司怎么有2个中文名啊。有木有人介绍下徐老板什么来头啊？