Marvell Singapore Job Opening
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SENIOR ANALOG/RF DESIGN ENGINEER (Code: WLCH)
The Job:
Design state-of-art analog/RF integrated circuit in advanced CMOS process
technologies
Perform correlation and silicon evaluation in laboratory
Requirements:
Phd in Electronics or BSc/MSc in Electronics from a reputable university
with at least 3 years experience.
Experience in RF IC Design especially in the areas of Power Amplifier
Understanding of analog and RF transistor device physics
Proficient with EM simulation tools such as Sonnet and Momentum
Experience with Cadence design tools (Analog Artist, SpectreRF,
Goldengate) is required
Knowledge of communication standards (Cellular, WLAN, BT etc) and mixed
signal components is highly desirable.
BSc/MSc with good academic record will also be considered
SENIOR DIGITAL DESIGN ENGINEER (Code: WLCH)
The Job:
Design and support all digital circuits for state-of-art wireless
communication products in advanced CMOS process technologies
Responsible for design, testing and qualification of mixed-signal ICs
Requirements:
Good Masters/Bachelor’s Degree in Electronics/Electrical Engineering
Minimum 3 years’ experience in all phases of digital design such as RTL
design, RTL verification, DFT, synthesis, timing analysis, test vector
generation, P&R, physical verification and silicon bring-up
Hands-on experience in at least 2 silicon tape-out throughout entire
digital flow of specification to prototype
Must be able to execute the entire design process with minimum
assistance
Knowledge of mixed-signal simulation (Cadence AMS) as well as
interfacing with analog functions
Knowledge of FPGA will be an added advantage
STAFF CIRCUIT DESIGN ENGINEER (Code: IPCH)
The Job:
Design and investigate new architectures to improve standard cell
libraries related to performance, area, power and yield
Focus primarily on 28nm and below technologies
Work closely with Layout Designers to ensure optimum cell layout
tradeoffs in order to meet stringent criteria due to increasing layout
dependent effects
Candidates hired as Designer Managers will be responsible for coordinating
tasks of Singapore local resources, gathering tasks and
priorities from the central library group as well as allocating tasks to
local team
Requirements:
Good Masters/Bachelor’s Degree in Electronics/Electrical Engineering
with minimum 3 years’ relevant industrial experience
Knowledgeable in digital logic circuits and spice simulation
Excellent Perl and Unix shell scripting skills for design automation as
well as analysis
Self motivated, independent and disciplined
Excellent command of written and spoken English
SENIOR / ANALOG DESIGN ENGINEER (Code: IPCH)
The Job:
Design standard cell libraries balancing size, speed and power trade-offs
Closely supervise Layout Designers to ensure final layouts are consistent
with target parameters
Requirements:
Good Bachelor’s Degree in Electronics / Electrical Engineering with
minimum 3 years’ experience in standard cell library design and layout for
size, speed and power
Experience in Spice, Laker, Virtuoso, Calibre DRC/LVS/LPE, StarRC-XT ,
library characterization tools and liberty syntax
Excellent Unix scripting skills, including Makefile and Perl for design
automation
Fresh Graduates with good academic results are also welcome to apply
Interested candidates, please e-mail your resume, degree and transcripts
with contact nos. and current & expected salaries to MAPLhr@marvell.com
Please state the job title and job code (if any) as email subject.
The Job:
Design state-of-art analog/RF integrated circuit in advanced CMOS process
technologies
Perform correlation and silicon evaluation in laboratory
Requirements:
Phd in Electronics or BSc/MSc in Electronics from a reputable university
with at least 3 years experience.
Experience in RF IC Design especially in the areas of Power Amplifier
Understanding of analog and RF transistor device physics
Proficient with EM simulation tools such as Sonnet and Momentum
Experience with Cadence design tools (Analog Artist, SpectreRF,
Goldengate) is required
Knowledge of communication standards (Cellular, WLAN, BT etc) and mixed
signal components is highly desirable.
BSc/MSc with good academic record will also be considered
SENIOR DIGITAL DESIGN ENGINEER (Code: WLCH)
The Job:
Design and support all digital circuits for state-of-art wireless
communication products in advanced CMOS process technologies
Responsible for design, testing and qualification of mixed-signal ICs
Requirements:
Good Masters/Bachelor’s Degree in Electronics/Electrical Engineering
Minimum 3 years’ experience in all phases of digital design such as RTL
design, RTL verification, DFT, synthesis, timing analysis, test vector
generation, P&R, physical verification and silicon bring-up
Hands-on experience in at least 2 silicon tape-out throughout entire
digital flow of specification to prototype
Must be able to execute the entire design process with minimum
assistance
Knowledge of mixed-signal simulation (Cadence AMS) as well as
interfacing with analog functions
Knowledge of FPGA will be an added advantage
STAFF CIRCUIT DESIGN ENGINEER (Code: IPCH)
The Job:
Design and investigate new architectures to improve standard cell
libraries related to performance, area, power and yield
Focus primarily on 28nm and below technologies
Work closely with Layout Designers to ensure optimum cell layout
tradeoffs in order to meet stringent criteria due to increasing layout
dependent effects
Candidates hired as Designer Managers will be responsible for coordinating
tasks of Singapore local resources, gathering tasks and
priorities from the central library group as well as allocating tasks to
local team
Requirements:
Good Masters/Bachelor’s Degree in Electronics/Electrical Engineering
with minimum 3 years’ relevant industrial experience
Knowledgeable in digital logic circuits and spice simulation
Excellent Perl and Unix shell scripting skills for design automation as
well as analysis
Self motivated, independent and disciplined
Excellent command of written and spoken English
SENIOR / ANALOG DESIGN ENGINEER (Code: IPCH)
The Job:
Design standard cell libraries balancing size, speed and power trade-offs
Closely supervise Layout Designers to ensure final layouts are consistent
with target parameters
Requirements:
Good Bachelor’s Degree in Electronics / Electrical Engineering with
minimum 3 years’ experience in standard cell library design and layout for
size, speed and power
Experience in Spice, Laker, Virtuoso, Calibre DRC/LVS/LPE, StarRC-XT ,
library characterization tools and liberty syntax
Excellent Unix scripting skills, including Makefile and Perl for design
automation
Fresh Graduates with good academic results are also welcome to apply
Interested candidates, please e-mail your resume, degree and transcripts
with contact nos. and current & expected salaries to MAPLhr@marvell.com
Please state the job title and job code (if any) as email subject.
