Re: PLL中电荷泵设计请教
时间：12-12
整理：3721RD
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OP LG should be large enough to track the two inputs. BW should be wide enough(comparing to ref freq). Loop should be stable enough(PM>55deg). Large enough CMIR to cover the vtune range.
However, even if everything is done. The effect of such an amp may still be less significant due to process mismatch. This can be seen from Monte-calro trans sim. Actually if u have used cascoded MOS with large L to reduce current mismatch, this amp is suggested to be removed for simplicity.
However, even if everything is done. The effect of such an amp may still be less significant due to process mismatch. This can be seen from Monte-calro trans sim. Actually if u have used cascoded MOS with large L to reduce current mismatch, this amp is suggested to be removed for simplicity.
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