Si/GaAs/GaN/InP PA
可以做但是标准CMOS工艺不会去这样做。
1.衬底减薄。现在的CMOS sub通常在600um，要做Via hole需要将sub减薄到100um
2.成本。GaAs Viahole用的是背面大面积镀金，而且需要做干法刻蚀。
3.成品率
对于SiGe我真的很不了解
所以深层次的原因我搞不明白
似乎InP相对于SiGe的优势还是在频率上面：
Compared to SiGe, InP
heterojunction bipolar transistors (HBTs) have 3.5:1 higher collector electron velocity and 10:1 higher base electron diffusivity. Consequently, at the same scaling generation InP HBTs would have 3:1 greater bandwidth than SiGe HBTs. Today the maturity of advanced silicon processes has enabled
SiGe HBTs to be fabricated with 100-nm emitter junctions with minimal extrinsic parasitics, while efforts to similarly scale InP HBTs have just begun. With that, SiGe HBTs have demonstrated simultaneous 300 GHz and 350 GHz and 102 GHz static frequency dividers, while InP DHBTs have obtained simultaneous 450 GHz and 490 GHz, 176 GHz power amplifiers with 5-dB power gain, and 150 GHz static frequency dividers. Consequently, the two technologies today have comparable bandwidth, with SiGe offering much higher levels of integration. Improved bandwidth and integration of InP HBTs therefore requires great consideration be given to scaling laws and limits, and the requirements placed upon transistor design for wide-band circuits must be clearly understood, where the ensuing fabrication processes
must provide high yield at 100-nm scaling.
出处：Zach Griffith, Transistor and Circuit Design for 100-200GHz ICs
IEEE JSSC 2005
见附件。