请问，FPGA与SFP 、SFP+接口的光模块连接？

可以直连，注意IO口配成对应的电平标准即可

in Virtex 6 / Kintex 7   - there is IP provided by xilinx for the PCS layer (PHY) for 1G or 10G,
They also provide MAC IP for interface to AXI

get the free demo copy of the Vivado or ISE and take a look through the IP for those parts

走AURORA协议就行

不是很懂啊