wire类型数据赋值有问题
时间:10-02
整理:3721RD
点击:
wire [64*Dim_size - 1:0] fai_out [0:Node_size - 1];
wire [64*Dim_size*Node_size - 1:0] fai_input_collection;
wire [64*Dim_size*Node_size - 33:0] fai_input_temp;
genvar i, j;
generate for (i = 0;i < Node_size;i = i + 1)
for (j = 0;j < 2*Dim_size;j = j + 1) begin
assign fai_input_collection = {fai_out[j*32 +: 32] , fai_input_collection[64*Dim_size*Node_size - 1:32]};
assign fai_input_temp = (i == 0 && j == 0) ? 'b0 : fai_input_collection[64*Dim_size*Node_size - 1:32];
assign fai_input_collection = {fai_out[j*32 +: 32] , fai_input_temp};
end
endgenerate
请大神帮我看看为啥这段代码仿真出来fai_input_collection,fai_input_temp波形为啥都是XXXXXXX?fai_out波形是正确的,每个clk输出都输出Node_size个值。有啥解决办法么?
wire [64*Dim_size*Node_size - 1:0] fai_input_collection;
wire [64*Dim_size*Node_size - 33:0] fai_input_temp;
genvar i, j;
generate for (i = 0;i < Node_size;i = i + 1)
for (j = 0;j < 2*Dim_size;j = j + 1) begin
assign fai_input_collection = {fai_out[j*32 +: 32] , fai_input_collection[64*Dim_size*Node_size - 1:32]};
assign fai_input_temp = (i == 0 && j == 0) ? 'b0 : fai_input_collection[64*Dim_size*Node_size - 1:32];
assign fai_input_collection = {fai_out[j*32 +: 32] , fai_input_temp};
end
endgenerate
请大神帮我看看为啥这段代码仿真出来fai_input_collection,fai_input_temp波形为啥都是XXXXXXX?fai_out波形是正确的,每个clk输出都输出Node_size个值。有啥解决办法么?
