大神们求回答小弟一个弱爆了的问题

小弟最近在做一个memory logic的simulation。结果发现xilinx ise里面的isim报错说
ERROR: In process address_combinor.vhd:65
FATAL ERROR:ISim: This application has discovered an exceptional condition from which it cannot recover. Process will terminate. To search for possible resolutions to this issue, refer to the Xilinx answer database by going to http://www.xilinx.com/support/answers/index.htm and search with keywords 'ISim' and 'FATAL ERROR'.

小弟的code在ise里面编译综合是没啥问题的，但是到了sim的时候就出毛病了。
65行内容是：
signal Dnum, logNnum, Ntemp : integer;
signal vabit : bit_vector(addr_width - 1 downto 0);
signal vabitll : bit_vector(addr_width - 1 downto 0);
signal vnumun : unsigned(addr_width - 1 downto 0);
signal vnum, hnum : std_logic_vector(addr_width-1 downto 0);
signal rowaddr : std_logic_vector(addr_width - 1 downto 0);

begin

logNnum <= conv_integer(logN);
Dnum <= conv_integer(logD);
Ntemp <= logNnum - Dnum;
vabit <= to_bitVector(va);
vabitll <= vabit sll ntemp; -----------65
vnum <= to_stdLogicVector(vabitll);
hnum <= ha;
rowaddr<= hnum + vnum;
finalrow<= rowaddr;

小弟是菜鸟。项目的程序太大实在是没法都贴上来。大神们能不能帮忙看看有没有类似的经验?

小编以前是用C的吧?
声明为INTEGER变量最好给范围。 signal para:integer 0 to 100 := 0;
*_VECTOR声明宽度是不能用变量的。