一个用ModelSim仿真lpm_ff的问题

我是一个FPGA初学者，刚刚接触用Modelsim-Altera 仿真。今天用一个例化的lpm_ff做练习，可是出现了问题。我编写的verilog 代码很简单，如下：
module FDDF(clk,clear,q);
input clk,
clear;

output q;
lpm_ff f1(.enable(1'b1),.clock(clk),.sclr(1'b0),.data(cle ar),.q(q));
defparam f1.LPM_WIDTH=1,
f1.LPM_FFTYPE = "DFF";

endmodule

然后是testbench 代码

`timescale 1 ps/ 1 ps
module FDDF_vlg_tst();
// constants
// general purpose registers
reg eachvec;
// test vector input registers
reg clear;
reg clk;
// wires
wire q;
// assign statements (if any)
FDDF i1 (
// port map - connection between master ports and signals/registers
.clear(clear),
.clk(clk),
.q(q)
);
initial
begin
// code that executes only once
// insert code here --> begin
clk=0;
clear=0;
// --> end
$display("Running testbench");
end
always #25 clk = ~clk ;

endmodule

`timescale 1 ps/ 1 ps
module FDDF_vlg_tst();
// constants
// general purpose registers
reg eachvec;
// test vector input registers
reg clear;
reg clk;
// wires
wire q;
// assign statements (if any)
FDDF i1 (
// port map - connection between master ports and signals/registers
.clear(clear),
.clk(clk),
.q(q)
);
initial
begin
// code that executes only once
// insert code here --> begin
clk=0;
clear=0;
// --> end
$display("Running testbench");
end
always #25 clk = ~clk ;

endmodule

编译都通过了，但用ModelSim-Altera 仿真的时候，报错了
错误代码是：Error: (vsim-10000) C:/Users/Tei.YLIB_TEI-PC/Desktop/DFF3/FDDF.v(10): Unresolved defparam reference to 'LPM_WIDTH' in f1.LPM_WIDTH.
Error: (vsim-10000) C:/Users/Tei.YLIB_TEI-PC/Desktop/DFF3/FDDF.v(11): Unresolved defparam reference to 'LPM_FFTYPE' in f1.LPM_FFTYPE.
我明明在代码里设定好了触发器的参数，但不知道为什么会报错。
各位高手谁能帮忙解答下，万分感激！