功能仿真正确,时序仿真时出现warning
提示内容出现在X_ARAMB36_INTERNAL.v,其内容为xilinx timing simulation library component 32k-BIT data and 4k-BIT parity dual port block ram
貌似说的是地址越界。比如的memory深度是16,但是给的地址大于等于16了(正常的地址是0-15)。请查看波形
用你的warning关键字在xilinx网站上搜索也没什么线索。不过lz已经定位到文件了,可以搜索产生warning的上下文,看看是计算了哪些timing还是在specify部分的?
我的fifo是16级深度的,我只写了两个数,然后一块读出,因此深度应该是没问题的
我在xilinx网站搜索到了X_ARAMB36 但感觉不是我出现的问题
Why do I get X_ARAMB36 Block RAM memory collisions when simulating the Video Scaler v1.0, v2.1, and v3.0?
解决方案
At the startup and whenever the read and write pointers for the line buffers are reset, during the simulation of the Video Scaler the following Memory Collision Errors are generated:
# Memory Collision Error on X_ARAMB36_INTERNAL :
video_scaler_wrap_tb.video_scaler_wrap_u.video_scaler_wrap_core_u.coef_ram_gen_bram_coefs.scaler1.
\Scaler_RTI_inst/Scaler_wrap0_inst/Scaler_wrap0_core_u/scaler_top_inst/Inst_scaler_v1/GenerateVariableCoefRAMs.
CoefMem/Mram_mem1 .INT_RAMB.chk_for_col_msg at simulation time 17428.500 ns.
These Memory Collision Errors from the Video Scaler can be safely ignored. The reason they occur is that the read and write pointers of internal Block RAM memory are reset to zero when the line is being written to memory. The core waits to read data; after a line is written and the core does not use the data, then the Memory Collision Errors occur.
把你的代码简化到能出问题的最小单元,然后贴上来看看
