信号的方向性
时间：10-02
整理：3721RD
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我的gpio模块的PIO信号定义为inout类型，我的高四位为输入，低四位为输出，低四位输出到芯片外部，高四位通过gpio读其他模块的标志信号，但是编译老是报错，
u_gpioa: gpio port map
(clk_in => clk_in,
CS => csa,
WE => wea,
RD => rda,
datain => ca,
dataout => tempa,
adr => adra,
PIO => PIOa
);
PIO<=PIOa(4 downto 0);
PIOa(7)<=AFull_wire;
PIOa(6)<=Full_wire;
PIOa(5)<=b;
PIOa(4)<=c;
Net "PIOa[7]" in work.top(behave) has mixed driver types, The conflicting connections are
u_gpioa: gpio port map
(clk_in => clk_in,
CS => csa,
WE => wea,
RD => rda,
datain => ca,
dataout => tempa,
adr => adra,
PIO => PIOa
);
PIO<=PIOa(4 downto 0);
PIOa(7)<=AFull_wire;
PIOa(6)<=Full_wire;
PIOa(5)<=b;
PIOa(4)<=c;
Net "PIOa[7]" in work.top(behave) has mixed driver types, The conflicting connections are
@E: BN129 :"f:\lattice_pro\yg_pro\int_pro\all\all3_gpio\top.vhd":6:7:6:9|Net "PIOa[7]" in work.top(behave) has mixed driver types
因为我的高四位要做输入啊，难道赋值要颠倒吗?求解
VHDL不懂啊
你至少要加个高阻态吧