timing报告怎么会有DCM信号问题？

时间：10-02 整理：3721RD 点击：

TS_clk_ex为外接晶振输入，然后经过内部spartan-6 DCM 20倍频，timing报告怎么会有DCM信号问题?
Component Switching Limit Checks: TS_clk_ex = PERIOD TIMEGRP "clk_ex" 110 ns HIGH 50%;
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Slack: 2.330ns (period - min period limit)
Period: 5.000ns
Min period limit: 2.670ns (374.532MHz) (Tdcmper_CLKFX)
Physical resource: dcm/dcm_sp_inst/CLKFX
Logical resource: dcm/dcm_sp_inst/CLKFX
Location pin: DCM_X0Y1.CLKFX
Clock network: dcm/clkfx
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Slack: 30.000ns (period - (min low pulse limit / (low pulse / period)))
Period: 110.000ns
Low pulse: 55.000ns
Low pulse limit: 40.000ns (Tdcmpw_CLKIN_1_10)
Physical resource: dcm/dcm_sp_inst/CLKIN
Logical resource: dcm/dcm_sp_inst/CLKIN
Location pin: DCM_X0Y1.CLKIN
Clock network: dcm/dcm_sp_inst_ML_NEW_divCLK

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