请问.25um的Gate:Area是多少？ (等效单元门面积？).35um？

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
Different Fab and ASIC lib has different area.

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
我记得：
.25 => 17 左右。
.18 => 10 左右.
可以自己算！
The gate count of a particular library cell corresponds with the function
of the standard gate count of the NAND-gate area in the technology library.
For example, if the NAND-gate cell area is specified as 23 in the technology
library and the flip-flop area is defined as 138, the total gate count of the
flip-flop is 138/23 or 6.
Similarly, the gate count of a design is the area of a design divided by
the gate count of the NAND gate (as defined in the technology library).
This number is the area of the NAND gate. To obtain the area of the design,
use the report_area command in Design Compiler. To find the total gate
count of the design, divide the cell area by the area of the NAND gate.

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
用的是tsmc的.25um, synopsys lib

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
[这个贴子最后由Jeff168在 2005/07/18 05:57pm 第 1 次编辑]
直接看综合后的cell报告文件中的 NAND2X1 或NOR2XL表示的值就是? 比如17

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
对，很简单，你做一个与非逻辑，然后report一下就可以了。

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
[这个贴子最后由Jeff168在 2005/07/18 05:59pm 第 1 次编辑]
    谢谢以上各位与小编！
  i think "report中的值"与"设计后期实际得出的的比值"会有些微小的差值，
比如report中的值为17,实际值为18或19.

请问.25um的Gate:Area是多少? (等效单元门面积?).35um?
SMIC 0.18 NAND 10.1um2

谢谢各位楼上的讨论，让我对面积报告有了清楚的认识，赞！

如果是90nm的工艺，等效面积是多少喃?

什么都看不到,za hui shi?

如果是90nm的工艺，等效面积是多少喃?
是2.8 吧

直接这样问是没有意义的
取决于FOUNDRY, PDK LIBRARY
包括谁做的PDK

anyone can share the technology library? thanks