Modelsim SE后仿真问题请教，急~~~
时间：10-02
整理：3721RD
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各位达人：
小弟在用Modelsim SE做PCI接口的后仿真，步骤是这样的，先在Modelsim根目录下新建文件夹test，将接口模块（顶层模块pci_top),和测试模块（顶层模块为pci_tb)放入其中，然后在Quartus下将这2个模块放入工程中，编译后在 test目录下出现新建的simulation\modelsim目录，里面有3个文件： pci_top.vo, pci_top_modelsim.xrf, pci_top_v.sdo,完了打开Modelsim SE建工程，将接口模块、测试模块、库文件都放入，编译通过。然后启动仿真器，在SDF选项卡处将pci_top_v.sdo加进去，Apply to Region处写的是/pci_tb/pci_tb，开始仿真后老是提示 ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/test/simulation/modelsim/pci_top_v.sdo(0): Failed to find INSTANCE '/test/pci_tb'.个人感觉应该是Apply to Region处出错，请各位高手告诉小弟怎么修改啊，尝试了很多方法，都不行，急死了～～～万分万分感谢！
补充：重新建个文件夹jiayou,将上面的步骤进行一遍后出现下面的错误提示：
# Loading C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(35): Failed to find INSTANCE '/pci_tb/pci_ad[0]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(49): Failed to find INSTANCE '/pci_tb/pci_ad[1]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(63): Failed to find INSTANCE '/pci_tb/pci_ad[2]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(77): Failed to find INSTANCE '/pci_tb/pci_ad[3]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(91): Failed to find INSTANCE '/pci_tb/pci_ad[4]~I/inst1'.
# ** Warning: (vsim-SDF-3432) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: This file is probably applied to the wrong instance.
# Ignoring subsequent missing instances from this file.
# ** Warning: (vsim-SDF-3440) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: Failed to find any of the 569 instances from this file.
# ** Warning: (vsim-SDF-3442) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: Try instance '/pci_tb/P_CLK'. It contains all instance paths from this file.
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo".
# Time: 0 ps Iteration: 0 Region: /pci_tb File: C:/Modeltech_6.0/jiayou/pci_tb.v
# Error loading design
到底怎么回事啊?请高手指教啊～～～～～
小弟在用Modelsim SE做PCI接口的后仿真，步骤是这样的，先在Modelsim根目录下新建文件夹test，将接口模块（顶层模块pci_top),和测试模块（顶层模块为pci_tb)放入其中，然后在Quartus下将这2个模块放入工程中，编译后在 test目录下出现新建的simulation\modelsim目录，里面有3个文件： pci_top.vo, pci_top_modelsim.xrf, pci_top_v.sdo,完了打开Modelsim SE建工程，将接口模块、测试模块、库文件都放入，编译通过。然后启动仿真器，在SDF选项卡处将pci_top_v.sdo加进去，Apply to Region处写的是/pci_tb/pci_tb，开始仿真后老是提示 ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/test/simulation/modelsim/pci_top_v.sdo(0): Failed to find INSTANCE '/test/pci_tb'.个人感觉应该是Apply to Region处出错，请各位高手告诉小弟怎么修改啊，尝试了很多方法，都不行，急死了～～～万分万分感谢！
补充：重新建个文件夹jiayou,将上面的步骤进行一遍后出现下面的错误提示：
# Loading C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(35): Failed to find INSTANCE '/pci_tb/pci_ad[0]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(49): Failed to find INSTANCE '/pci_tb/pci_ad[1]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(63): Failed to find INSTANCE '/pci_tb/pci_ad[2]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(77): Failed to find INSTANCE '/pci_tb/pci_ad[3]~I/inst1'.
# ** Error: (vsim-SDF-3250) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo(91): Failed to find INSTANCE '/pci_tb/pci_ad[4]~I/inst1'.
# ** Warning: (vsim-SDF-3432) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: This file is probably applied to the wrong instance.
# Ignoring subsequent missing instances from this file.
# ** Warning: (vsim-SDF-3440) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: Failed to find any of the 569 instances from this file.
# ** Warning: (vsim-SDF-3442) C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo: Try instance '/pci_tb/P_CLK'. It contains all instance paths from this file.
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "C:/Modeltech_6.0/jiayou/simulation/modelsim/pci_top_v.sdo".
# Time: 0 ps Iteration: 0 Region: /pci_tb File: C:/Modeltech_6.0/jiayou/pci_tb.v
# Error loading design
到底怎么回事啊?请高手指教啊～～～～～
xiexie
wo yiqian ye you guo！
貌似是sdf文件对应的模块名有问题，还有就是在sdf文件中选上option选项，两个都选上
同样的问题，求助！
这个问题我已经解决，其实时序仿真时只需要添加.vo文件，其他不相关的文件都不要添加。
我之前把三个文件：顶层模块，激励文件，网表文件都添加了就出现了上面的错误，后来只用网标文件就可以了
学习了，谢谢
8# AmoiBB
Thanks ！
9# pappinait
Thanks ！
受教了，多谢
顶一下……学习来了