quarterⅡ中一个报错
时间：10-02
整理：3721RD
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我是新手，以前没接触过，现在要用quartusⅡ写一个fifo的程序，出现
1、Error (10170): Verilog HDL syntax error at afifo.v(2) near text "'"; expecting an identifier, or "module", or "macromodule", or "function", or "parameter", or "primitive", or "real", or "realtime", or "reg", or "specparam", or "task", or "time", or "integer", or "config", or "localparam", or "(*", or "include", or "library"）
2、Warning (10235): Verilog HDL Always Construct warning at generation empty flag.v(24): variable "rempty" is read inside the Always Construct but isn't in the Always Construct's Event Control
3、Error: Net "wfull~0", which fans out to "wfull", cannot be assigned more than one value
Error: Net is fed by "fifomem:fifomem|wfull"
Error: Net is fed by "wptr_full:wptr_full|wfull"
怎么解决啊
1、Error (10170): Verilog HDL syntax error at afifo.v(2) near text "'"; expecting an identifier, or "module", or "macromodule", or "function", or "parameter", or "primitive", or "real", or "realtime", or "reg", or "specparam", or "task", or "time", or "integer", or "config", or "localparam", or "(*", or "include", or "library"）
2、Warning (10235): Verilog HDL Always Construct warning at generation empty flag.v(24): variable "rempty" is read inside the Always Construct but isn't in the Always Construct's Event Control
3、Error: Net "wfull~0", which fans out to "wfull", cannot be assigned more than one value
Error: Net is fed by "fifomem:fifomem|wfull"
Error: Net is fed by "wptr_full:wptr_full|wfull"
怎么解决啊
怎么看好像是你的FIFO名字没有定义呢?能不能上代码的前面部分?