这种错误怎么改？

时间：10-02 整理：3721RD 点击：

自己写的一段编码的程序：
  源码：
process(clk)
  begin
  if(clk'event and clk='1') then
      if(next_bit= '0')  then
         spdif <= not prev_spdif;
      else
         spdif <=  prev_spdif;
      end if;
      end if ;
   if(clk'event and clk='0') then
      if(next_bit= '0')  then
         spdif <= not prev_spdif;
      else
         spdif<= not prev_spdif;
      end if;
      end if ;
end process;
end rl;
报错：
   Error (10819): Netlist error at led.vhd(34): can't infer register for spdif because it changes value on both rising and falling edges of the clock
Error (10822): HDL error at led.vhd(27): couldn't implement registers for assignments on this clock edge
Error (10822): HDL error at led.vhd(34): couldn't implement registers for assignments on this clock edge
Error: Can't elaborate top-level user hierarchy
Error: Quartus II Analysis & Synthesis was unsuccessful. 4 errors, 0 warnings
Info: Allocated 144 megabytes of memory during processing
Error: Processing ended: Mon Jan 01 03:02:29 2001
Error: Elapsed time: 00:00:35

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