赛灵思FPGA的SRL16移位寄存器原理与使用

SSRL16 SRL16_inst (
.Q(Q), // SRL data output
.A0(A0), // Select[0] input
.A1(A1), // Select[1] input
.A2(A2), // Select[2] input
.A3(A3), // Select[3] input
.CLK(CLK), // Clock input
.D(D) // SRL data input

);

// The following defparam declaration is only necessary if you wish to
// change the initial contents of the SRL to anything other than all
// zero's. If the instance name to the SRL is changed, that change
// needs to be reflected in the defparam statements.

defparam SRL16_inst.INIT = 16'h0000;

// End of SRL16_inst instantiation