How to measure complex impedance of LDMOS with VNA

Hi,

I have a LDMOS transistor and would like to know its complex impedance in a frequency range not specified by the vendor. I would like to measure it so that I can design a wideband matching network. How do I measure the complex impedance ?.

I wanted to do the following but don't know if this is the correct way:

I wanted to build a simple narrow band matching network for input and output. Match (tune) for optimum IP3 (that is needed due to complex modulation form OFDM). Than remove the LDMOS and measure from 50 Ohm input to Gate of LDMOS while the LDMOS is removed. I think this would give me the conjugated impedance !. The same for the output and this for all freq. values ?... Does this work ?..

The Working Freq. is between 175 MHz and 450 MHz !..

Thanks,

Paul.

That approach won't work. You need to put the transistor in a 50 Ohm fixture, biased up to the bias point that you want. Then, measure the input/output impedances directly. From the measured impedances, you can then calculate a matching circuit that provides the complex conjugate.

I assume this is for a PA, so you will need large signal S-paramters, which you will acheive by driving a signal into the PA that is comparable to the drive level that the exciter stage will provide. I'm sure that Agilent has some interesting app notes that cover this.

Dave

Hi Dave,

But HOW do you measure it directly ?...

best regards,

Paul.

I agree with PaulHolland. His method is used for power amplifier design from long years ago.