Technology files for Asitic modeling inductor

when using asitic modeling inductor, it require a technology file like this:
<chip>
chipx = 512 ; dimensions of the chip in x direction in microns
chipy = 512 ; dimensions of the chip in y direction
fftx = 256 ; x-fft size (must be a power of 2)
ffty = 256 ; y-fft size
TechFile = sample.tek ; the name of this file
TechPath = /home/niknejad/tekf ; the pathname of the data files
freq = .1
eddy = 0 ; Layer 0 defined below is conductive
eddy = 1 ; Layer 1 defined below is also conductive
; Layer 2 is not conductive (oxide)

<layer> 0 ; Bulk Substrate

rho = .1 ; Resistivity: ohm-cm
t = 400 ; Thickness: microns
eps = 11.9 ; Permitivity: relative

<layer> 1 ; Epi Layer

rho = 15 ; ohm-cm
t = 1 ; microns
eps = 11.9 ; relative

<layer> 2 ; Oxide Layer

rho = 1e10 ; ohm-cm
t = 50 ; microns
eps = 4 ; relative

<metal> 0 ; Substrate Contact Layer

layer = 1 ; Epi Layer
rsh = 30 ; Sheet Resistance Milli-Ohms/Square
t = 0.1 ; Metal Thickness (microns)
d = .5 ; Distance from bottom of layer (microns)
name = msub ; name used in ASITIC
color = yellow ; color in ASITIC

<via> 0 ; metal 1 to substrate

top = 1 ; via connects up to this metal layer
bottom = 0 ; via connects down to this metal layer
r = 5 ; resistance per via
width = .4 ; width of via
space = 1.3 ; minimum spacing between vias
overplot1 = .3 ; minimum dist to substrate metal
overplot2 = .3 ; minimum dist to metal 1
name = via0 ; name in ASITIC
color = purple ; color in ASITIC

<metal> 1 ; metal layer 1

layer = 2
rsh = 50
t = 1
d = 1.62
name = m1
color = red

<via> 1 ; metal 1 to metal 2

top = 2
bottom = 1
r = 4
width = .5
space = 1.5
overplot1 = .4 ; to substrate metal
overplot2 = .4 ; to metal 1
name = via1
color = white

<metal> 2 ; metal 2

layer = 2
rsh = 32
t = 1.3
d = 2.74
name = m2
color = blue


where can i find these parameters in charter's process kit?

Try seeking this information from the foundry used, usually the foundry could help out. In another option you could read through thr process and do some estimation such as if the process you are using does not include epi layer you can give the parameter corresponding this layer very small values such as 1e-10. I had been also using ASITIC extensively for inductor generation. Hope this helps

Rgds

some useful paper