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about the control voltage of the vco in a pll

时间:04-10 整理:3721RD 点击:
hi!
i build a pll voltage domain model with veriloga,and it works.then i replace the vco with a real circuit of transistors while the others remains implemented by veriloga.the linear process is basiclly the same.but if zooming out the waveform,we will find the voltage is always oscillating hidding in the linear process,and the control voltage does not settle to a stable value.it oscillates in a frequency much higher than the nature frequency of the pll.i do not think it is ripple because the pfd is ideal and the peak-to-peak value is close to 0.02v.and the peak value of the control voltage indeed deceases,but slowly.the pll circuit totally implemented with transistors have the same problem too.the nonlinearity of the vco causes this?give me some advice,please
best regards

simply speaking,the control voltage of vco oscillate at a frequency,which is much higher than the nature frequency.give me some explanation,please.thanks a lot

If the frequency of the seen oscillations is very high and of very small amplitude, then it may result from the calculations accuracy .When you use relatively large
time step, you may see some small ripples at the control voltage .But I'm not sure if this is your case .

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