DC: Defining constrains for the design

Hi,

I am a new user of DC and I have some question about setting constraints. Can some one reply to these following questions ?

1- What should be the input delays, set up an hold time to set as constraints in DC for a dff in a 65 nm technology ?
2- How to define these constrains for other components such as Latches, counters, ..
3- What is the range of the maximum frequency we can reach ?

Thanks,