asitic inductor
时间:04-09
整理:3721RD
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For the PLL, I use ASITIC to model the onchip inductor in vco. How to know whether the modeled inductor Q is right by measurement? I think the VCO Q is different from the inductor Q.
Thanks.
Thanks.
You have to perform inductor characterization by measuring the fabricated inductor. I have attached a paper which describes one method of characterizing on-chip inductors.
- ASITIC Balun/Transformer Creation
- Parasitic Capacitance of the Isolation Resistor of a Wilkinson combiner
- Parasitic extraction of CNTs and GNRs.
- [Moved]: ASITIC Dielectric Layer Tangent Loss
- Why Parasitic Inductance of Cadence Capacitor Varies Very Little with Its Size
- How to calculate parasitic resistance and capacitance of an inductor theoretically
