help S-parameter test problem

I have a FET's s2p file tested under common SOURCE config.Now I have some problems with it.As the picture,I have add a resistor between the SOURCE and GND,and add another resistor between the DRAIN(output) and GATE(input),Because the DRAIN is not directly connected with the GND,and There is a feedback loop between DRAIN and GATE,I want to know whether this config is valid for my tested S2P file?

It's difficult for me understanding Your problem, I try a generic answer.

As You know, the s par completely describe the behaviour of the respective network (the FET for instance).
Regardless to what is connected outside the reference planes of the network ports.

So, if You have the measured spar of the FET (the FET alone - common source), You may put it on both virtual circuit (ADS) or real circuit and perform measurement.

A different scenario (the reverse engineering) . In real case, if You, helped by a VNA, may measure spar of Your circuit and Your target is get FET spar, You may put the measured spar of the circuit into a simulator, and add:
a resistor of value -R12 over GND line
a resistor of value -R13 between In and Out.
and perform the simulation, the result is spar of the FET

I Hope This help You