hp application note 920

what's the name of the application?

it is for building a frequency multiplier circuit with a step recovery diode(srd)
i don't have any more information
thank you

Here you are.

Yep, thats the one! It is a shame in this modern age of CAD RF software suites, that no one has properly modeled the SRD diode yet! What the heck are they waiting for?

This app note is great for designing a comb generator, and it works exactly as described. It is also great if you want to build something like a X10 multiplier.

Where this paper takes a left turn from reality is when you are designing a X2 to X4 multiplier. By following this paper's method, you will get maybe 10-30% efficiency. By doing a modern design, using the correct terminating impedances on the idler frequencies, you can get 80% for a X2, for instance.

when you say 'doing a modern design' what do you mean exactly?

Hi Borber,

Thanks for the old HP appl.note.
Just a question. Do you know some source, where old HP appl.notes and HP Journals are available on the net ? I am looking for some old ANs and HPJ articles, but I cannot locate them on the net.
Unfortunately Agilent left behind these things when changed to its new name.
g579

I found this AN on some japanese url but do not remember what. I have downloaded all what they have and can upload if I have what you want. As I remember most AN's where about SRD.

By "modern design", I mean two chronological things.

This app note was written when smith charts, slotted lines, and empiricle methods ruled.

A little after this time period, people realized that diode multipliers could be optimized by properly terminating all the possible frequencies that they see or could generate. For instance, if you were building a X3, you wanted to a) provide a DC port to the diode that was an short circuit for all RF frequencies below around 100 MHz, and an open circuit for all above, b) provide the right impedance match at Fin, c) provide the right pure reactance to the diode at 2 Fin, d) provide the right impedance match at 3 Fin, and 3) provide an open circuit at all other frequencies to the diode. Under these conditions, the 3rd harmonic is optimized AND not other spurious oscillations can result. Papers by Penfield, Rafuse, Goff, etc.

Today (except for the lacking of a good SRD diode model), we understand filter synthesis well, can match the right impedances vs fequency to the diode, can simulate in large signal and optimize. A good analogy would be how you would analyze/optimize a Class E power amplifier today using CAD.

i was wondering if you could help me once more. At the HP application note for the srd generator there is a DC voltage supply beside the AC, at the ipmulse generator schematic. What could be it's voltage. Thank you.

All multipliers have to have a DC return. Usually you just connect a resistor (1K , 20 K, etc) to ground and you are done.

In certain cases you put a reverse bias on the diode to accentuate certain harmonics (say 5 volts). It is a GOOD IDEA to also use a series current limiting resistor between the diode and the power supply, in case you hook it up backwards.

In certain cases, if you are starved for RF power, you can put a small (say 0.5 mA) forward bias into the diode to get it to multiply at smaller input powers than normal, but again use a current limiting resistor.

Borber i was wondering if you have any AN refering especially to the resonant output network of the frequency multiplier.
I want to built this part with a λ/4 microstrip design but i don't what shoulb be thw width of the line..
Thank you

Sorry. I don't have it.

The concept of a frequency multiplier is pretty basic. It is the implementation that is sometimes hard.

If you have a highly non-linear device like a varactor diode or a step recovery diode, they when you place a sine wave voltage of frequency f across the diode terminals, then due to the nonlinear effects you can expect that the current flowing in the diode will have f, 2f, 3f, 4f,....20f components to it.

In the old days, when we did not understand nonlinear circuits very well, some smart guys like Penfield and Rafuse figured out that an optimal solution to building a multiplier would be to:

1) Provide the correct input impedance (source resistance and reactance)
2) Provide the correct output impedance (load resistance and reactance)
3) Provide purely reactive loads to all the harmonics that are not desired (called "idler frequencies"). These idler terminations consisted of a circuit paralell to the diode that provided a conjugate reactance (inductive) to cancel out the diodes own effective capacitance, thereby allowing large lossless idler currents to flow.

Now, with modern non-linear analysis programs AND a good SRD model (posted recently on this board!), you can do all this optimization and design with a modern CAD program. This is good, because in practice it was usually very hard (even impossible) to simultaneously meet all three of the above criteria (something called Foster's reactance theory often got in the way). So with a modern CAD program, you can play around and get the best results.

Without that, and trying to use the old 1960's papers, the best way to design the multiplier output is to be a matching network that got the right impedance to the diode (usually somewhere in the 20 to 5 ohm region and a reactance that matched out the effective diode capacitance (2 * the capacitance at its breakdown voltage was the standard expected). And the input structure and any idlers had to look like real open circuits to the diode terminals to keep all the output power going out the output port.

As far as filtering, once you have done the impedance matching at the output, then any standard bandpass filter will further reduce the unwanted harmonics (but will not improve the multiplier efficiency any).

What the "idler circuits" are doing, if you think about it, are waveshaping the diode current so that you are maximizing the RF output power at the desired harmonic.

Some good stuff to read:

Stephen A. Maas, ?Nonlinear Microwave and RF Circuits?, 2nd edition, 2003.
Penfield and Rafuse, ?Varactor Applications?, M.I.T. Press, Cambridge, 1962.
M. T. Faber, "Microwave and Millimeter Wave Diode Frequency Multipliers", 1995.

The filter of this application is to be a coupled line badpass microstrip filter with Chebyslev design(N=5) wich i have simulated in Aggilent ADS with quite good results. The resonant output network will be a microstrip TL λ/4 long at 5 GHz output.The width of the line should give Z>20R and will be experimentally determined (by coupling).
As far as the The impulse generator circuit it is designed and ready to be built with an msd736 srd, but i do not know any CAD programm with wich i could simulate it.
If you could assist me once more.

How you designed the filter is of no consequence. You could make one out of marshmallows if you wished. The only thing that matters is what impedance is the filter loading the terminals of the SRD with at the various idler frequencies.

If you choose to not learn the theory, simply put a 4 dB attenuator between the output filter and the comb generator, and everything will operate "normally" (ie with poor conversion efficiency). A halfway measure would be to put a line stretcher between the comb gen and the filter and find the best distance to place the filter at--this should pick up the comb tooth you want by at least a few dB.

i doubt that if the diode has better performance than the intergrated chip mulitier.

Some of the results of my frequency multiplier based on the old HP App notes.
The perspective of an expert on this results and how they are translated is needed.

As i studied the results i saw that when the power was going over 16 dBm(max output power of the generator) the output had a tension to arise more harmonic frequencies and the Fourier spectrum was becoming more clear. i used a 10 dBm amplifier and the results were much beter now at 25 dBm.

can you upload the schemaics?

thnks