Question about CML divider

I made a CML divider. It can easily work up to 4GHz @tt. But when I change the section to ss, it doesn't work anymore. Even I reduce the input freq to 2GHz/1GHz/500MHz or increase the current, it doesn't divide. I guess the problem maybe oscillation startup, so I increas the simulation time and improve the simulation presicion. But this doesn't have any effect.
Does anyone met this problem?
What should I do?
Thanks!