stratix iii pll

How can I get a clock frequency of 528MHZ, 330MHz and 66Mhz from a single PLL and which device is supporting it. What should be the input frequency and what are the ratios that needs to be set for obtaining those results

Consider a VCO operation range of 600 to 1300 MHz for Stratix III and integer pre and post dividers, and you'll see, that it isn't possiblewith a single PLL, although the three frequencies have integer ratios. It's possible with two cascaded or independant PLLs only, I think.