The capacitive load of transmission

Hi

I am designing a block whcih will drive a transimission (50cm long) and a FPGA chip.The block will works in 1.25G.

I wonder, in simulation, how to define the load? especially the capacitive load? 5pF is enough?

BTW, the output of the block is PECL.

Thanks

You can model transmission lines in SPICE.
Although at the end the model is reduced
to a resistor(attenuation) in series, an
inductance in series(depending mainly of
distance) and a capacitor in parallel(depen
ding mainly from geometry).
The L/C combination is just a low pass
filter.