crystal oscillator parameter

Hello everyone,

I'm a new designer of PLL system, currently I have to choose a crystal oscillator as the reference signal generator. The datasheet of the one chosen is attached. But I'm not quite familiar with these parameters in the datasheet, could anyone help me with this? Thanks.

1. Output Level
In the datasheet, output high: 90% Vdd and the mim Vdd is 2.5 V. But in our designed circuit, the high level is required < 1.5 V, is anyway to adjust the crystal's output level?

2.Output waveform
Don't know about TTL and CMOS means. Is that square wave or sinusoid wave?

3.Transition Times
I supposed it means rising and falling times. In the datasheet, it is about 5n sec. But in our design circuit of divider's output, the transition time is about 70 ps. I'm not sure what will happen in PFD. Do we need to adjust the Transition Times in our cirucit to make it the same level of crytal's output?

4. Tri-State Function
No ideal of this parameter

5. Jitter and phase noise
It is said 'Absolute Clock Period Jitter = 40 pSec' in the datasheet. But I saw some other datasheet using Jitter RMS or phase noise. Since we often utilize phase noise in our VCO and PLL design, I'm not familiar with jitter. Is this 40 psec jitter good for a crystal? Is any simple method to tranfer jitter to phase noise (I read some references about how jitter relative to phase noise, but still not very clear)?

looking foward your reply.

Thanks and regards,

Mobil

Output Level
The Oscillator output high level is ~ 2.2 V. Based on your description, it sounds like a logic high is 1.5 V. Since the Oscillator output is higher than a logic high, you should be OK. There is a potential problem to check, thought. make sure that when you put in 2.2 V into the Reference oscillator input, you won't overdrive the input.

Transition Times:
You'll get some jitter in the PLL because of the Rise/Fall time. You don't need to match the transition times in your circuit to match the XO, the two parameters are separate. They do contribute to the phase noise/jitter separately.

Jitter and Phase Noise:
Jitter, RMS/Absolute and phase noise are ways to refer to the noise on the output of an oscillator. To first order, Jitter is Integrated Phase Noise, so you can go from a phase noise plot to a jitter value. I'm not aware of a way to go from Jitter to Phase noise. One way to think of it is that Phase noise is in the frequency domain, while jitter is in the time domain.

Dave
www.keystoneradio.com

Thanks Dave.

But for the high level voltage I'm afraid it could burn out the transistor since the crystal output is connected to the IC chip transistor gate directly.

For a crystal jitter, any ideas for a good jitter performance, such that if a crystal has phase noise of -160 dBc/Hz @ 1 MHz, I would say it has good noise performance.

Thanks.

Mobil

Hi:

You'll have to check the transistor parameters to see if the output of the XO will cause trouble.

Not sure off the top of my head about jitter.

Dave