Colpitts Crystal Oscillator Design
I want to design a colpitts crystal oscillator with operating frequency of 4MHZ. This is the calculations that i have done, please check and advise.
I want to calculate the values of R1, R2, C1, C2, C3 and C4, see attachment.
I saw a guide saying C1 should be a value between (39 ? 82)pF and C2 between (39 - 220)pF for good performance
Please can you check for me if the above calculation is correct, please
Yes it is correct.
Now what ?
The R1, R2, Rc calculation is obviously for a different circuit, in so far the resistor values are not correct and won't bias the transistor in a useful operation point.
@FvM what should the resistors be? Or rather, how should i calculate them? Please share?
@kripacharya, once the resistor are correct would be to try build the citcuit and test using oscilloscope.
Knowing the ESR of the crystal is needed to determine the correct bias values since you need to have a gm high enough to overcome the ESR of the crystal when combined with the calculated total Xc to sustain oscillation.
Hi E-Design,
How do i get the ESR of the crystal?
@ E-Design, how did you get the values for the circuit? Can you please show me the calculations..
The ESR can be obtained from the datasheet or can be measured with the right instruments.
Here you can study the math behind calculating the component values:
https://www.maximintegrated.com/en/a...ex.mvp/id/5265
In many cases to obtain better a phase noise you prefer to have a bigger bias current. That increases the saturation output power of the oscillator, and hence also the sine signal to oscillator noise source levels. But you should be carefull not to increase it too much because you can overstress the crystal resulting in damage. Check in the datasheet of the crystal what the maximum rated power of power dissipation is.
This statement is not %100 correct.Because when you increase the bias current, you will increase the noise contributors coming from active device.( especially Shot Noise will be increased rapidly in BJT transistors)
There is an equilibrium point for Phase Noise shifting between bias current and Phase Noise.
I agree with you that the noise power increases, but so does the output power. Typically a noise generaion is proportional with the bias current, but the output power is squared proportional. So in general the oscillators with best phase noise have highest power consumption, because the SNR (look at Leeson's formula) is better. But yes there may be pitfalls, it's just a general rule of thumb.