lna oscillation
An LNA is designed at 10 GHz for narraw band, for frequency less than 10 GHz the LNA oscillate so how can we eliminate these oscillations which will disturb the amplifier.
the transistr is unconditionnaly stable at that frequency
pls i need a solution if there is.
Check the unstable frequency range.
Put the lossy network for this range only and check for stability.
Increase the loss of this filter network till you get the broad band stability.
"the transistr is unconditionnaly stable at that frequency "
Well...obviously not true! Your model is incorrect. Either you are not properly modelling the transistor, including via hole inductance, lead length, solder blobs, wirebond lengths, etc, or your original Sparameters are wrong, or there is some feedback coupling mechanism you are not modelling properly.
check your bias tees decoupling...a simple test is to place your finger between the DC line and ground where your decoupling caps in the bias tee are, (press a bit hard) see if that removes the oscillation. If thats the case probably your bias tees dont work well. Otherwise you have too much gain, lowering the gain of your LNA will help stability or your S parameters are simply wrong. As biff44 said your LNA is not unconditionally stable.. BTW the LNA oscillates at 10GHz or at some other frequency ? if is oscillating at another frequency just kill the gain at those frequencies.
Fisrt thank you all for answring me ..
yeah the transistor is unconditionnaly stable and when i made the LNA there is oscillation less and more then the operating frequency
How can kill the gain at those frequencies. (Soben) ?
and also, why there is a shift in frequency ? how can we concel it ?
pls urgent..
when you say "oscillate" do you mean an unwanted signal at 9 GHz, or unwanted sidebands 20 MHz away from a carrier?
As you can see the oscillation appears when the module in dB of S11 and S22 > 1 !
anther probelm is in shift frequency, my design is at 10 GHz or at that frequency the gain is negative and when i have positive gain the module S11 and S22 is > 1..
how can we rectify thoses problem ?
Added after 2 hours:
dear Soben, couls you exaplain more how can we kill gain in other frquencies ?
and also, why there is a shift in frequency ?
thank you in advance
NO ANSWER !
I said to kill the gain at the unwanted frequency as a suggestion, but that does not apply in your application. It will have, if the undesired oscillation frequency, was further away from your operational frequency and you still had gain. But in your case your gain is in the wrong frequency.
The shift in frequency can be due to various reasons, amplifier data S parameters are not the same as the actual device ones. But I think the major problem will probably be your matching network that due to tolerances of process may have changed. At 10Ghz you don't need much of a change to shift in frequency. Also the way you have layout your board, there are all shorts of things that can go wrong if not done properly.
From the measured S parameters u have post it looks to me u have a proper oscillator going on.
BTW is your input match network high or Low Q ? if is high Q will be more critical to manufacturing tolerances.
thank you soben,
i did not understand how to kill gain as you have written it ?
(I said to kill the gain at the unwanted frequency as a suggestion, )
and what you suggest me to do as re-simulate again or what should i do ?
many thx
You have reflection gain above 10 GHz and your gain response is really peaking at 10.5GHZ ... This really looks like an amplifier at the edge of instability, even at 50 Ohm. Your responses totally not smooth. Are you trying to bias the transistor with lumped elements perhaps? At 10GHz that would not be a good idea.
I suggest the original poster WinRAR the design files and upload here together with a circuit diagram.
Hi
Perhaps a photo of a PCB with transistor and other elements will be even
more helpful. Even the best designs simulations easily oscillate if not laid out properly.
flyhigh