how to design a lna circuit for 800mhz

Hey, I am desiging an 800MHz LNA. The spec for it its S11 and S22 <-10, NF<0.8 and Gain preferably as high as possible.

Before biasing the network, i would able to get those results. After biasing it, i failed to achieve the goal that i want. Could anyone help me in this?
I need it urgently.

Thanks.

Regards,
Jun

The design is wrong.
S-para based design will not effect by bias.
You need to do spice model simulation.

When using S-parameters for LNA simulation you do not need to bias the amplifier. Normally the manufacturer will supply s-parameter files (s2p or touchstone) at different bias levels and one of those should suit your needs.
Think of them as a de-embedded VNA measured transistor using a network analyzer and exporting the S-parameter file. This makes LNA design much simpler and more accurate. You will still need to design your bias network but you will not require a voltage source.
Since LNAs are used in the linear region you can do a strictly linear analysis. If you need to simulate IP3 or P1dB you will require a Spice model. It may just be easier to measure these parameters on the bench when you have hardware.

edit: I noticed your bias networks are DC blocked. ?

May I know how to do the spice model simulation in ADS?

thanks.

Added after 5 minutes:

Hey, Do you mean when i bias the transistor, the initial Gain,NF and all will not be affected? cause during biasing the transistor, resistors will be added on to the circuit to get Vds and Ids required.
Do advise me on this. I'm quite confuse right now.

find atf55143 s-parameter models at this link: http://www.avagotech.com/pages/en/rf...ect/atf-55143/

These are already biased, so to use these models you should include your bias circuit but not the voltage source. The linear simulator will not use the voltage source.

I do not believe the spice model is available for this part. So you should just use the linear simulator for this. The bias circuit, depending on how well it is designed can have an impact on your noise figure. At some point you need to properly decouple your power supply lines with larger capacitor values depending on the frequency your are working with.
R6 and R5 will have an impact on noise figure, but may be necessary for stability.
For simplicity you could design your bias circuit as a low pass filter that will not pass RF into your power supply but will provide DC to the transistor. But it is also possible do design your bias circuit as part of your matching network serving as two functions.

If this is still confusing, you may want to read some application notes for this part.