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pll interview questions

时间:04-08 整理:3721RD 点击:
Please kindly help me think (predict) a few questions regarding PLL/CDR/VCO that interviewer could ask.

This position is an Application Engineer ...
Could you please proivde must-know questions with PLL/CDR/VCO ?

I would be prepared to answer questions about lock time, loop filters, frequency resolution, etc. Also, be prepared with the fundamental limits of PLLs and perhaps some simple PLL circuits.

You could perhaps do some research to learn some interesting and fun facts about PLLs. Interviewers like to learn things and fun details will make your interview more memorable.

Hi QT_girl,

I think, primarily you should be prepared to answer some GENERAL questions, as for example:
- what is the purpose of an PLL (fields of usage)
- what are the main components
- what kind of controller ? (low pass filter or PI)
- Why low pass or PI?
- What specific property has the low pass and WHY ? (finite zero)
- Basics and restrictions of the linear PLL model
- how and why can the loop acquire lock - even if both frequencies are not equal ?
(pull-in process).

Regards and good luck

Hi,

Thanks very much for this comment. I was actually hired from another interview I had. I'm sure this thread will be useful for others though.

Tks again and pls keep posting.

See Dean's book: "PLL Performance, Simulation And Design Handbook 4th Edition"
http://www.national.com/analog/timing/pll_designbook

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