post layout simulation result of lna not match to pre layout simulation

i have designed Lna in cadence but when i do post layout simulation results (gain,nf..) decreases . how to optimize my layout so that difference between pre and post simulation results is minimized.



thank you.

In the design simulation you have to input as more as you have in terms of layout parasitics (traces, pads, couplings, etc.).
After that have to tune and optimize the final circuit.