DRC errors in 90nm technology layout
时间：04-07
整理：3721RD
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Hi,
I am designing a circuit using UMC 90nm technology and generated the layout automatically. But I am getting certain DRC errors, some of them being:
i) metal corners should be 135 degrees
ii) vertice not on grid
Please suggest some way out of it.
Apart from this, the DRC rules file had certain problems in including other files mentioned in it, so I had to specify the full pathname of the files, to be included, in the rules file and then use this new rules file to run DRC. Same thing is happening in the case of LVS too. Can anyone suggest why?
I am designing a circuit using UMC 90nm technology and generated the layout automatically. But I am getting certain DRC errors, some of them being:
i) metal corners should be 135 degrees
ii) vertice not on grid
Please suggest some way out of it.
Apart from this, the DRC rules file had certain problems in including other files mentioned in it, so I had to specify the full pathname of the files, to be included, in the rules file and then use this new rules file to run DRC. Same thing is happening in the case of LVS too. Can anyone suggest why?