use PLL as n-PSK modulator?

using pll as FSK modulator is easy to understand.how to use a PLL as PSK modulator? Anyone have suggestion?
I have read some article about using PLL as GMSK modulator by dlta-sigma modulator. changing the divider N could chang the frequency,but how could the N divider affect phase of VCO output?

You can't use just one PLL for making a PSK modulator.
There is a possibility to use two synchronized PLL's (working as phase/frequency modulators) with summed outputs, and a phase shifter.

you could also combine a PLL with a DDS chip, where the DDS either sums in a phase shift via a mixer before the divider, or the DDS is the PLL clock, and you modulate (in small steps) the clock. These only work for low data rates due to PLL settling time.

do you mean that the data rate must be lower than loop bandwidth?